[Bug gas/20759] New: sparc spec of gas implementations

2016-11-02 Thread ikozhukhov at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=20759

Bug ID: 20759
   Summary: sparc spec of gas implementations
   Product: binutils
   Version: 2.27
Status: UNCONFIRMED
  Severity: normal
  Priority: P2
 Component: gas
  Assignee: unassigned at sourceware dot org
  Reporter: ikozhukhov at gmail dot com
  Target Milestone: ---

i'm using DilOS (illumos based platform)
i have SPARC and can build dilos-illumos by gcc44 with bootstrap:
gcc-4.4.7 + SunAS(old) + illumos ld

illumos ld based on spec of elf:
https://docs.oracle.com/cd/E26502_01/html/E26507/chapter6-54839.html

i looked to GAS in binutils 2.27 and i can see a lot of differences in types
implementations - relocation type R_SPARC_OLO10, HH22, etc.

could you please provide your sparc spec what you are using.
can you update GAS to SPARC spec based on :
https://docs.oracle.com/cd/E26502_01/html/E26507/chapter6-54839.html

we have to use illumos ld for ctf.

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[Bug binutils/20763] New: 8e opcode wrong disassembling

2016-11-02 Thread anatolymik at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=20763

Bug ID: 20763
   Summary: 8e opcode wrong disassembling
   Product: binutils
   Version: 2.26
Status: UNCONFIRMED
  Severity: minor
  Priority: P2
 Component: binutils
  Assignee: unassigned at sourceware dot org
  Reporter: anatolymik at gmail dot com
  Target Milestone: ---

8e opcode(mov Sw, Ew) is disassembled wrong for source register operand.

There is example for 16-bit mode here:
66 8e c0:mov es, eax

but must be:
66 8e c0:mov es, ax

Most significant bits of source register is ignored unlike 8c opcode(mov Ev,
Sw). For 8c opcode most significant bits are zeroed if operand size is larger
than 16 bit.

Source register is 16-bit for all processor modes.

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