[Bug gas/18559] Added support for better disassembling of VMOV reg,immediate with VFP coprocessor

2015-07-29 Thread alessandro.marzocchi at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=18559

--- Comment #3 from Alessandro Marzocchi  ---
No problem
  Regards
   Alessandro

2015-07-16 17:46 GMT+02:00 nickc at redhat dot com <
sourceware-bugzi...@sourceware.org>:

> https://sourceware.org/bugzilla/show_bug.cgi?id=18559
>
> Nick Clifton  changed:
>
>What|Removed |Added
>
> 
>  Status|NEW |RESOLVED
>  CC||nickc at redhat dot com
>  Resolution|--- |FIXED
>
> --- Comment #2 from Nick Clifton  ---
> Hi Alessandro,
>
>   Thanks very much for developing this patch.  I have now applied it to the
> sources, so we should now be seeing more helpful output from the ARM
> disassembler.
>
> Cheers
>   Nick
>
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[Bug ld/18735] New: multiple definition of `foo'

2015-07-29 Thread hjl.tools at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=18735

Bug ID: 18735
   Summary: multiple definition of `foo'
   Product: binutils
   Version: 2.26 (HEAD)
Status: NEW
  Severity: normal
  Priority: P2
 Component: ld
  Assignee: unassigned at sourceware dot org
  Reporter: hjl.tools at gmail dot com
  Target Milestone: ---

[hjl@gnu-6 pr18720]$ cat foo1.c
#if 0
void
foo (void)
{
}

asm (".symver foo,foo@FOO");
#else
void
foo (void)
{
}

asm (".symver foo,foo@@FOO");
#endif
[hjl@gnu-6 pr18720]$ gcc -c foo1.c
[hjl@gnu-6 pr18720]$
/export/build/gnu/binutils-misc/build-x86_64-linux/ld/ld-new -r foo1.o
foo1.o:(*IND*+0x0): multiple definition of `foo'
foo1.o:foo1.c:(.text+0x0): first defined here
[hjl@gnu-6 pr18720]$

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[Bug binutils/18736] New: x86 vcvtsi2sd has {er} decorator in wrong place

2015-07-29 Thread m at rolle dot name
https://sourceware.org/bugzilla/show_bug.cgi?id=18736

Bug ID: 18736
   Summary: x86 vcvtsi2sd has {er} decorator in wrong place
   Product: binutils
   Version: 2.24
Status: NEW
  Severity: normal
  Priority: P2
 Component: binutils
  Assignee: unassigned at sourceware dot org
  Reporter: m at rolle dot name
  Target Milestone: ---

The vcvtsi2sd instruction has the {er} decorator associated with the last
operand.  See Intel doc:

EVEX.NDS.LIG.F2.0F.W1 2A /r
VCVTSI2SD xmm1, xmm2, r/m64{er}

However, objdump produces, as an example,

5290:   62 61 97 10 2a f0   vcvtsi2sd xmm30,xmm29,{rn-sae},rax

Also, as requires the form

vcvtsi2sd xmm30,xmm29,{rn-sae},rax

and it will not accept the (proper) form

vcvtsi2sd xmm30,xmm29,rax,{rn-sae}#  Error: operand type mismatch for
`vcvtsi2sd'

as does not produce incorrect code, but it is a serious problem because it will
not assemble code that follows the Intel spec.

I suspect that in both as and objdump, there is logic that associates the {er}
decorator with the last _vector_ source operand, rather than the last vector or
GPR source.  They correctly ignore immediate operands.

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[Bug gas/18737] New: Wrong memory operand size for x86 GATHER/SCATTER instructions

2015-07-29 Thread m at rolle dot name
https://sourceware.org/bugzilla/show_bug.cgi?id=18737

Bug ID: 18737
   Summary: Wrong memory operand size for x86 GATHER/SCATTER
instructions
   Product: binutils
   Version: 2.24
Status: NEW
  Severity: normal
  Priority: P2
 Component: gas
  Assignee: unassigned at sourceware dot org
  Reporter: m at rolle dot name
  Target Milestone: ---

gather/scatter instructions require a memory size to match the vector register
size.  However, the memory size is actually the element size, according to
Intel doc.  as will accept memory operand without a size specifier.

vgatherqps ymm30{k1},DWORD PTR [rcx+zmm31*4+0x400]  # Error: operand size
mismatch for `vgatherqps'
vgatherqps ymm30{k1},YMMWORD PTR [rcx+zmm31*4+0x400]
vgatherqps ymm30{k1},[rcx+zmm31*4+0x400]
vscatterqps DWORD PTR [rcx+zmm31*4+0x400]{k1},ymm30   # Error: operand size
mismatch for `vscatterqps'
vscatterqps YMMWORD PTR [rcx+zmm31*4+0x400]{k1},ymm30
vscatterqps [rcx+zmm31*4+0x400]{k1},ymm30

If possible, why don't you accept both the vector size and the element size. 
Otherwise, please change the vector size to the element size.

Does not produce incorrect code, but it is serious because it will not assemble
a valid instruction according to the Intel doc.

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[Bug gas/18736] x86 vcvtsi2sd has {er} decorator in wrong place

2015-07-29 Thread m at rolle dot name
https://sourceware.org/bugzilla/show_bug.cgi?id=18736

Michael Rolle  changed:

   What|Removed |Added

  Component|binutils|gas

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[Bug gas/18736] x86 vcvtsi2sd has {er} decorator in wrong place

2015-07-29 Thread m at rolle dot name
https://sourceware.org/bugzilla/show_bug.cgi?id=18736

--- Comment #1 from Michael Rolle  ---
Note the objdump problem should be forwarded to the binutils component.

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[Bug binutils/18738] New: Wrong memory operand size for x86 GATHER/SCATTER instructions

2015-07-29 Thread m at rolle dot name
https://sourceware.org/bugzilla/show_bug.cgi?id=18738

Bug ID: 18738
   Summary: Wrong memory operand size for x86 GATHER/SCATTER
instructions
   Product: binutils
   Version: 2.24
Status: NEW
  Severity: minor
  Priority: P2
 Component: binutils
  Assignee: unassigned at sourceware dot org
  Reporter: m at rolle dot name
  Target Milestone: ---

objdump disassembles gather/scatter instructions showing the vector operand
size as the memory operand size.  However, the Intel doc says it is the element
size.

In these examples:

   0:   62 22 7d 41 93 74 b9vgatherqps ymm30{k1},YMMWORD PTR
[rcx+zmm31*4+0x100]
   7:   40
   8:   62 22 7d 41 a3 74 b9vscatterqps YMMWORD PTR
[rcx+zmm31*4+0x100]{k1},ymm30
   f:   40

YMMWORD PTR should be DWORD PTR.

(objdump did get the disp*N compression right, converting a 40h displacement
byte into a 0x100 displacement.)

See also bug 18737 for similar problem with gas assembler.

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[Bug gas/18736] x86 vcvtsi2sd has {er} decorator in wrong place

2015-07-29 Thread hjl.tools at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=18736

H.J. Lu  changed:

   What|Removed |Added

 CC||hjl.tools at gmail dot com

--- Comment #2 from H.J. Lu  ---
(In reply to Michael Rolle from comment #0)
> The vcvtsi2sd instruction has the {er} decorator associated with the last
> operand.  See Intel doc:
> 
> EVEX.NDS.LIG.F2.0F.W1 2A /r
> VCVTSI2SD xmm1, xmm2, r/m64{er}

This is a notation in ISA spec, not the assembly manual.

> However, objdump produces, as an example,
> 
> 5290: 62 61 97 10 2a f0   vcvtsi2sd xmm30,xmm29,{rn-sae},rax
> 
> Also, as requires the form
> 
> vcvtsi2sd xmm30,xmm29,{rn-sae},rax
> 

This is the form for GNU assembler.

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[Bug gas/18737] Wrong memory operand size for x86 GATHER/SCATTER instructions

2015-07-29 Thread hjl.tools at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=18737

H.J. Lu  changed:

   What|Removed |Added

 CC||fomin at protonmail dot ch,
   ||hjl.tools at gmail dot com

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[Bug binutils/18738] Wrong memory operand size for x86 GATHER/SCATTER instructions

2015-07-29 Thread hjl.tools at gmail dot com
https://sourceware.org/bugzilla/show_bug.cgi?id=18738

H.J. Lu  changed:

   What|Removed |Added

 CC||fomin at protonmail dot ch,
   ||hjl.tools at gmail dot com

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