[Bug ld/14189] New: assertion fail ../../bfd/elf32-arm.c:12264
http://sourceware.org/bugzilla/show_bug.cgi?id=14189 Bug #: 14189 Summary: assertion fail ../../bfd/elf32-arm.c:12264 Product: binutils Version: 2.23 (HEAD) Status: NEW Severity: normal Priority: P2 Component: ld AssignedTo: unassig...@sourceware.org ReportedBy: ronald.w...@raritan.com Classification: Unclassified Created attachment 6428 --> http://sourceware.org/bugzilla/attachment.cgi?id=6428 test case I have an issue were I get an "assertion fail ../../bfd/elf32-arm.c:12264" when I link a shared library which links itself two static libraries and hides the symbols using the "--exclude-libs ALL" switch. The sources are build with -ffunction-sections and -fdata-sections and at link time --gc-section is used. When removing --gc-sections or --exclude-libs the problem disappears. See the attached testcase (tar containing 3 short C files and a Makefile which you need to adapt for the right compiler name since it is an arm cross compiler) Actually the output is currently: $ make ../bin/arm-PP-linux-uclibcgnueabi-gcc -fPIC -ffunction-sections -fdata-sections -c -o test.o test.c ../bin/arm-PP-linux-uclibcgnueabi-gcc -fPIC -ffunction-sections -fdata-sections -c -o test1.o test1.c rm -f libtest1.a ../bin/arm-PP-linux-uclibcgnueabi-ar cru libtest1.a test1.o ../bin/arm-PP-linux-uclibcgnueabi-gcc -fPIC -ffunction-sections -fdata-sections -c -o test2.o test2.c rm -f libtest2.a ../bin/arm-PP-linux-uclibcgnueabi-ar cru libtest2.a test2.o ../bin/arm-PP-linux-uclibcgnueabi-gcc -shared -o libtest.so test.o -Wl,--gc-sections,--exclude-libs,ALL -L. -ltest2 -ltest1 /opt/pp_toolchain/cross/008/bin/../lib/gcc/arm-pp-linux-uclibcgnueabi/4.6.3/../../../../arm-pp-linux-uclibcgnueabi/bin/ld: BFD (Linux/GNU Binutils) 2.22.52.0.2.20120424 assertion fail ../../bfd/elf32-arm.c:12264 Looking at the code I saw that there was some recent activity where the assert is generated (PLT ref count book-keeping check). Probably some case was overlooked?! -- Configure bugmail: http://sourceware.org/bugzilla/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug ld/14189] assertion fail ../../bfd/elf32-arm.c:12264
http://sourceware.org/bugzilla/show_bug.cgi?id=14189 H.J. Lu changed: What|Removed |Added Status|NEW |WAITING CC||hjl.tools at gmail dot com --- Comment #1 from H.J. Lu 2012-05-31 19:09:50 UTC --- Please provide a self-contained testcase with only assembly codes for cross binutils. Not all binutils developers have ARM cross compilers. -- Configure bugmail: http://sourceware.org/bugzilla/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug ld/14189] assertion fail ../../bfd/elf32-arm.c:12264
http://sourceware.org/bugzilla/show_bug.cgi?id=14189 Ronald Wahl changed: What|Removed |Added Attachment #6428|0 |1 is obsolete|| --- Comment #2 from Ronald Wahl 2012-05-31 20:45:08 UTC --- Created attachment 6430 --> http://sourceware.org/bugzilla/attachment.cgi?id=6430 test case with assembly only Added test case which uses only assembly so no cross compiler is required. -- Configure bugmail: http://sourceware.org/bugzilla/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug ld/14189] assertion fail ../../bfd/elf32-arm.c:12264
http://sourceware.org/bugzilla/show_bug.cgi?id=14189 Ronald Wahl changed: What|Removed |Added Status|WAITING |NEW -- Configure bugmail: http://sourceware.org/bugzilla/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug ld/14189] --gc-sections doesn't work
http://sourceware.org/bugzilla/show_bug.cgi?id=14189 H.J. Lu changed: What|Removed |Added CC||rsandifo at sourceware dot ||org Summary|assertion fail |--gc-sections doesn't work |../../bfd/elf32-arm.c:12264 | --- Comment #3 from H.J. Lu 2012-05-31 21:08:22 UTC --- It was caused by http://sourceware.org/ml/binutils-cvs/2011-03/msg00080.html -- Configure bugmail: http://sourceware.org/bugzilla/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug binutils/14190] New: objdump 2.19 [avr 8] using -d, "lpm" without post-increment incorrectly disassembled with "+"
http://sourceware.org/bugzilla/show_bug.cgi?id=14190 Bug #: 14190 Summary: objdump 2.19 [avr 8] using -d, "lpm" without post-increment incorrectly disassembled with "+" Product: binutils Version: 2.19 Status: NEW Severity: normal Priority: P2 Component: binutils AssignedTo: unassig...@sourceware.org ReportedBy: xarq...@gmail.com Classification: Unclassified Created attachment 6431 --> http://sourceware.org/bugzilla/attachment.cgi?id=6431 Assembler test file to show "lpm r2,Z" disassembling incorrectly Hello, I believe objdump -d (for AVR-8 architecture, any variant) incorrectly dis-assembles the "lpm" instruction without post-increment of Z register with a post-increment symbol ("+"). See the AVR Instruction Set manual LPM description to see the three opcode variations (i, ii, and iii below). Opcode varient (ii) should not post-increment Z. Repro: [Sample assembly file showing assembled listing] > avr-as -aln -mmcu=atmega328p avr-objdump-bug.S -o avr-objdump-bug.o 1 C895 lpm ; (i) implied opcode (r0,Z) 2 0002 0490 lpm r0,Z; (ii) explicit without post-increment 3 0004 0590 lpm r0,Z+ ; (iii) explicit with post-increment 4 0006 2490 lpm r2,Z; (ii) explicit without post-increment 5 0008 2590 lpm r2,Z+ ; (iii) with post-increment > avr-objdump -d avr-objdump-bug.o avr-objdump-bug.o: file format elf32-avr Disassembly of section .text: <.text>: 0: c8 95 lpm 2: 04 90 lpm r0, Z+ [INCORRECT] 4: 05 90 lpm r0, Z+ 6: 24 90 lpm r2, Z+ [INCORRECT] 8: 25 90 lpm r2, Z+ [NOTE: see how the op-codes differ between 2: and 4: and 6: and 8: (and I believe are correct), but the instructions are disassembled the same. I believe the x4 xx op-codes should not have a post-increment output on the mnemonic.] > avr-objdump -v GNU objdump (WinAVR 20100110) 2.19 Thanks! -- Configure bugmail: http://sourceware.org/bugzilla/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are on the CC list for the bug. ___ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils