[Bug binutils/5449] "data not in region 1 for SHARE_MAGIC" after strip with 2.18
--- Additional Comments From haubi at gentoo dot org 2007-12-07 08:39
---
Created an attachment (id=2126)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=2126&action=view)
binary built on ia64-hp-hpux11.23 with gcc-4.1.1
Source file simply contained one line:
int main(void) { return 0; }
--
http://sourceware.org/bugzilla/show_bug.cgi?id=5449
--- You are receiving this mail because: ---
You are on the CC list for the bug, or are watching someone who is.
___
bug-binutils mailing list
bug-binutils@gnu.org
http://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/5457] INTOUCH instruction incorrectly disassembled.
--- Additional Comments From schwab at suse dot de 2007-12-07 23:19 --- According to the M68000PRM a cache field of 0 is valid for both cpush and cinv. The change needs to be restricted to the ColdFire. -- http://sourceware.org/bugzilla/show_bug.cgi?id=5457 --- You are receiving this mail because: --- You are on the CC list for the bug, or are watching someone who is. ___ bug-binutils mailing list bug-binutils@gnu.org http://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/5457] INTOUCH instruction incorrectly disassembled.
--- Additional Comments From shap at eros-os dot com 2007-12-07 22:01 --- Created an attachment (id=2127) --> (http://sourceware.org/bugzilla/attachment.cgi?id=2127&action=view) Fix to mask values for cpush* instructions on m68k target. -- http://sourceware.org/bugzilla/show_bug.cgi?id=5457 --- You are receiving this mail because: --- You are on the CC list for the bug, or are watching someone who is. ___ bug-binutils mailing list bug-binutils@gnu.org http://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/5457] INTOUCH instruction incorrectly disassembled.
--- Additional Comments From shap at eros-os dot com 2007-12-08 02:27 --- Hmm. Thank you for pointing that out. Actually, M68000PRM specifies that if that field is 0 then the operation is a no-op. While the encoding is hypothetically legal, the definition of the assembly language syntax for caches on page 3-3 does not define any syntax for legally specifying that the no-op was the intended cache. On the whole, I'm inclined to think that any instruction actually specifying this field as zero is a bug, and doing something clever in the disassembler here may not be called for. The worst that will happen is that an instruction that shouldn't have been specifiable in legal assembly input will decode as INTOUCH in the disassembler. In all honesty I prefer your approach, but I'm not clear how to express it within the mechanisms of the current opcode tables. Also, I'm not clear (that is: I do not know) whether the object file format provides sufficient information to know what the target CPU was at dissassembly time. If it does not, then I think it's better to allow the syntactically invalid M68000 instruction to decode as INTOUCH. Opinion? -- http://sourceware.org/bugzilla/show_bug.cgi?id=5457 --- You are receiving this mail because: --- You are on the CC list for the bug, or are watching someone who is. ___ bug-binutils mailing list bug-binutils@gnu.org http://lists.gnu.org/mailman/listinfo/bug-binutils
[Bug gas/5457] New: INTOUCH instruction incorrectly disassembled.
The "intouch" instruction is incorrectly disassembled as cpushl on platforms supporting mcfisa_b or mcfisa_c. A patch correcting this is attached. Repeat by compiling an assembly file containing use of an intouch instruction: intouch %a0 then attempt to disassemble. The disassembly will report: cpushl nc,%a0@ The error lies in the fact that the 'cc' field of cpush* and cinv* is incorrectly decoded. A value of 0 in this field is illegal, and the code point was reused for the INTOUCH instruction on the coldfire. In consequence, ANY disassembly result reporting "nc" indicates an illegal opcode. As of binutils-2.18, the specifications for both cpush* and cinv* use mask fields that incorrectly match a cc field value of 0. This has the effect of preventing disassembly of INTOUCH, (which is entered correctly, but is never matched). The attached patch corrects the mask values for CPUSH*. I left the CINV* instructions alone, because (1) there are no conflicting instruction patterns to be decoded, and (2) I don't have an m68040 manual to confirm that a cc field value of zero is reserved for that instruction. I would be happy to supply a regression test, but I'm not sure how to go about that. I have confirmed that the attached patch corrects the disassembly error by testing it against Coyotos kernel bootstrap code. -- Summary: INTOUCH instruction incorrectly disassembled. Product: binutils Version: 2.18 Status: NEW Severity: normal Priority: P2 Component: gas AssignedTo: unassigned at sources dot redhat dot com ReportedBy: shap at eros-os dot com CC: bug-binutils at gnu dot org GCC target triplet: any m68k mcfisa_b or mcfisa_c target http://sourceware.org/bugzilla/show_bug.cgi?id=5457 --- You are receiving this mail because: --- You are on the CC list for the bug, or are watching someone who is. ___ bug-binutils mailing list bug-binutils@gnu.org http://lists.gnu.org/mailman/listinfo/bug-binutils
