@@ -2331,40 +2337,74 @@ static Value *upgradeARMIntrinsicCall(StringRef Name,
CallBase *CI, Function *F,
llvm_unreachable("Unknown function for ARM CallBase upgrade.");
}
+// These are expected to have have the arguments:
cdevadas wrote:
```suggestion
// T
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/96162?utm_source=stack-comment-downstack-mergeability-warning";
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/96163?utm_source=stack-comment-downstack-mergeability-warning";
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cdevadas wrote:
> This looks like it is affecting codegen even when xnack is disabled? That
> should not happen.
It shouldn't. I put the xnack replay subtarget check before using *_ec
equivalents. See the code here:
https://github.com/llvm/llvm-project/commit/65eb44327cf32a83dbbf13eb70f9d8c03
@@ -867,13 +867,104 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Returns true if it is a naturally aligned multi-dword load
@@ -886,26 +977,17 @@ multiclass SMRD_Pattern {
def : GCNPat <
(smrd_load (SMRDSgpr i64:$sbase, i32:$soffset)),
(vt (!cast(Instr#"_SGPR") $sbase, $soffset, 0))> {
-let OtherPredicates = [isNotGFX9Plus];
- }
- def : GCNPat <
-(smrd_load (SMRDSgpr i64:$sbase,
@@ -867,13 +867,104 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Returns true if it is a naturally aligned multi-dword load
@@ -1701,17 +1732,33 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const
CombineInfo &CI,
return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM;
}
case S_LOAD_IMM:
-switch (Width) {
-default:
- return 0;
-case 2:
- return AMDGPU::S_LOAD_DWORDX2_IMM;
@@ -1701,17 +1732,33 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const
CombineInfo &CI,
return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM;
}
case S_LOAD_IMM:
-switch (Width) {
-default:
- return 0;
-case 2:
- return AMDGPU::S_LOAD_DWORDX2_IMM;
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+if (T
@@ -183,10 +183,10 @@ define <2 x half> @local_atomic_fadd_v2f16_rtn(ptr
addrspace(3) %ptr, <2 x half>
define amdgpu_kernel void @local_atomic_fadd_v2bf16_noret(ptr addrspace(3)
%ptr, <2 x i16> %data) {
; GFX940-LABEL: local_atomic_fadd_v2bf16_noret:
; GFX940: ; %bb.0:
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@@ -183,10 +183,10 @@ define <2 x half> @local_atomic_fadd_v2f16_rtn(ptr
addrspace(3) %ptr, <2 x half>
define amdgpu_kernel void @local_atomic_fadd_v2bf16_noret(ptr addrspace(3)
%ptr, <2 x i16> %data) {
; GFX940-LABEL: local_atomic_fadd_v2bf16_noret:
; GFX940: ; %bb.0:
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@@ -183,10 +183,10 @@ define <2 x half> @local_atomic_fadd_v2f16_rtn(ptr
addrspace(3) %ptr, <2 x half>
define amdgpu_kernel void @local_atomic_fadd_v2bf16_noret(ptr addrspace(3)
%ptr, <2 x i16> %data) {
; GFX940-LABEL: local_atomic_fadd_v2bf16_noret:
; GFX940: ; %bb.0:
cdevadas wrote:
Ping
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@@ -658,17 +658,17 @@ define amdgpu_kernel void
@image_bvh_intersect_ray_nsa_reassign(ptr %p_node_ptr,
;
; GFX1013-LABEL: image_bvh_intersect_ray_nsa_reassign:
; GFX1013: ; %bb.0:
-; GFX1013-NEXT:s_load_dwordx8 s[0:7], s[0:1], 0x24
+; GFX1013-NEXT:s_load_dwordx8
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cdevadas wrote:
> I still think it is terribly surprising all of the test diff shows up in this
> commit, and not the selection case
Because the selection support is done in the next PR of the review stack,
https://github.com/llvm/llvm-project/pull/96162. This patch takes care of
choosing the
cdevadas wrote:
The latest patch optimizes the PatFrag and the patterns written further by
using OtherPredicates. The lit test changes in the latest patch are a missed
optimization I incorrectly introduced earlier in this PR for GFX7. It is now
fixed and matches the default behavior with the c
cdevadas wrote:
### Merge activity
* **Jul 23, 4:02 AM EDT**: @cdevadas started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/96162).
https://github.com/llvm/llvm-project/pull/96162
__
cdevadas wrote:
### Merge activity
* **Jul 23, 4:02 AM EDT**: @cdevadas started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/96163).
https://github.com/llvm/llvm-project/pull/96163
__
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https://github.com/llvm/llvm-project/pull/101619
Use the constrained buffer load opcodes while combining under-aligned
load for XNACK enabled subtargets.
>From ad8a8dfea913c92fb94079aab0a4a5905b30384d Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Dat
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/101619?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/cdevadas ready_for_review
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>From ad8a8dfea913c92fb94079aab0a4a5905b30384d Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Tue, 30 Jul 2024 14:46:36 +0530
Subject: [PATCH 1/3] [AMDGPU][SILoadStoreOptimizer] Include constrained
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/101619
>From ad8a8dfea913c92fb94079aab0a4a5905b30384d Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Tue, 30 Jul 2024 14:46:36 +0530
Subject: [PATCH 1/4] [AMDGPU][SILoadStoreOptimizer] Include constrained
@@ -0,0 +1,930 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -verify-machineinstrs
-run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -
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cdevadas wrote:
### Merge activity
* **Aug 6, 1:43 AM EDT**: @cdevadas started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/101619).
https://github.com/llvm/llvm-project/pull/101619
_
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https://github.com/llvm/llvm-project/pull/103721
None
>From cc30faa32e7828d74826421cdae50464ede38e0b Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Wed, 14 Aug 2024 14:18:59 +0530
Subject: [PATCH] [AMDGPU][R600] Move R600TargetMachine into
R600
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/103721?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/cdevadas ready_for_review
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>From a10910597e6ee30e87dd09a4f77fcfa1729873f0 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Wed, 14 Aug 2024 14:18:59 +0530
Subject: [PATCH 1/2] [AMDGPU][R600] Move R600TargetMachine into
R600Co
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This definition shouldn't be in AMDGPU TM.
>From 6ab7119cd8b4e63dad2625b0aa9416e2898a3bbc Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Wed, 14 Aug 2024 20:50:30 +0530
Subject: [PATCH] [AMDGPU][R
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/104038?utm_source=stack-comment-downstack-mergeability-warning"
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>From f2095f23eaa5c3876bf7f8d5706881e404c5aa1b Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Wed, 14 Aug 2024 14:18:59 +0530
Subject: [PATCH 1/3] [AMDGPU][R600] Move R600TargetMachine into
R600Co
cdevadas wrote:
### Merge activity
* **Aug 19, 10:55 AM EDT**: @cdevadas started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/103721).
https://github.com/llvm/llvm-project/pull/103721
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>From 607099de09be2fed6d9277c8439ade69e0820d92 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Thu, 29 Aug 2024 22:21:22 +0530
Subject: [PATCH] [CodeGen][NewPM] Port MachineCSE pass to new pas
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/106605?utm_source=stack-comment-downstack-mergeability-warning"
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>From 607099de09be2fed6d9277c8439ade69e0820d92 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Thu, 29 Aug 2024 22:21:22 +0530
Subject: [PATCH 1/2] [CodeGen][NewPM] Port MachineCSE pass to new pass
@@ -932,18 +935,55 @@ bool
MachineCSE::isProfitableToHoistInto(MachineBasicBlock *CandidateBB,
MBFI->getBlockFreq(MBB) + MBFI->getBlockFreq(MBB1);
}
-bool MachineCSE::runOnMachineFunction(MachineFunction &MF) {
- if (skipFunction(MF.getFunction()))
-return false
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/106605
>From 607099de09be2fed6d9277c8439ade69e0820d92 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Thu, 29 Aug 2024 22:21:22 +0530
Subject: [PATCH 1/3] [CodeGen][NewPM] Port MachineCSE pass to new pass
@@ -932,18 +935,55 @@ bool
MachineCSE::isProfitableToHoistInto(MachineBasicBlock *CandidateBB,
MBFI->getBlockFreq(MBB) + MBFI->getBlockFreq(MBB1);
}
-bool MachineCSE::runOnMachineFunction(MachineFunction &MF) {
- if (skipFunction(MF.getFunction()))
-return false
cdevadas wrote:
Ping
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cdevadas wrote:
### Merge activity
* **Sep 4, 8:51 AM EDT**: @cdevadas started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/106605).
https://github.com/llvm/llvm-project/pull/106605
_
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https://github.com/llvm/llvm-project/pull/108507
None
>From b56e90fa59c0f5db905b94aa74c771e3f72cd81d Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Thu, 12 Sep 2024 23:38:09 +0530
Subject: [PATCH] [CodeGen][NewPM] Port machine trace metrics anal
https://github.com/cdevadas created
https://github.com/llvm/llvm-project/pull/108508
None
>From 8c819329488c087fce339d4fd65761bc986ed80e Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 13 Sep 2024 12:22:03 +0530
Subject: [PATCH] [CodeGen][NewPM] Port EarlyIfConversion pass to
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/108508?utm_source=stack-comment-downstack-mergeability-warning"
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/108507?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/cdevadas ready_for_review
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@@ -39,41 +39,68 @@ using namespace llvm;
#define DEBUG_TYPE "machine-trace-metrics"
-char MachineTraceMetrics::ID = 0;
+AnalysisKey MachineTraceMetricsAnalysis::Key;
-char &llvm::MachineTraceMetricsID = MachineTraceMetrics::ID;
+MachineTraceMetricsAnalysis::Result
+Machine
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108508
>From 8c819329488c087fce339d4fd65761bc986ed80e Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 13 Sep 2024 12:22:03 +0530
Subject: [PATCH 1/2] [CodeGen][NewPM] Port EarlyIfConversion pass to NP
https://github.com/cdevadas created
https://github.com/llvm/llvm-project/pull/108514
None
>From 2941048b558ae43ff0c96a1cc301976435c95a7f Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 13 Sep 2024 13:53:01 +0530
Subject: [PATCH] [AMDGPU][NewPM] Fill out addILPOpts.
---
llvm/
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/108514?utm_source=stack-comment-downstack-mergeability-warning"
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Author: Christudasan Devadasan
Date: 2021-01-22T13:38:52+05:30
New Revision: c971bcd2102b905e6469463fb8309ab3f7b2b8f2
URL:
https://github.com/llvm/llvm-project/commit/c971bcd2102b905e6469463fb8309ab3f7b2b8f2
DIFF:
https://github.com/llvm/llvm-project/commit/c971bcd2102b905e6469463fb8309ab3f7b2b
Author: Christudasan Devadasan
Date: 2021-01-22T14:20:59+05:30
New Revision: ff8a1cae181438b97937848060da1efb67117ea4
URL:
https://github.com/llvm/llvm-project/commit/ff8a1cae181438b97937848060da1efb67117ea4
DIFF:
https://github.com/llvm/llvm-project/commit/ff8a1cae181438b97937848060da1efb67117
Author: Christudasan Devadasan
Date: 2021-01-06T10:30:50+05:30
New Revision: d68458bd56d9d55b05fca5447891aa8752d70509
URL:
https://github.com/llvm/llvm-project/commit/d68458bd56d9d55b05fca5447891aa8752d70509
DIFF:
https://github.com/llvm/llvm-project/commit/d68458bd56d9d55b05fca5447891aa8752d70
Author: Christudasan Devadasan
Date: 2021-01-08T10:56:35+05:30
New Revision: ae25a397e9de833ffbd5d8e3b480086404625cb7
URL:
https://github.com/llvm/llvm-project/commit/ae25a397e9de833ffbd5d8e3b480086404625cb7
DIFF:
https://github.com/llvm/llvm-project/commit/ae25a397e9de833ffbd5d8e3b480086404625
https://github.com/cdevadas commented:
The changes you made in llvm/lib/CodeGen/MIRParser/MIRParser.cpp are not
related to this PR.
Create a separate NFC patch for it.
https://github.com/llvm/llvm-project/pull/111634
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https://github.com/llvm/llvm-project/pull/108507
>From e0e4e978c06a2c78b31382274527201e03082e00 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Thu, 12 Sep 2024 23:38:09 +0530
Subject: [PATCH 1/3] [CodeGen][NewPM] Port machine trace metrics analys
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108507
>From e0e4e978c06a2c78b31382274527201e03082e00 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Thu, 12 Sep 2024 23:38:09 +0530
Subject: [PATCH 1/3] [CodeGen][NewPM] Port machine trace metrics analys
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108508
>From 9f27fd5fbaa0c9a9075d074d1915ea0cc65e3b07 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 13 Sep 2024 12:22:03 +0530
Subject: [PATCH 1/2] [CodeGen][NewPM] Port EarlyIfConversion pass to NP
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108508
>From 9f27fd5fbaa0c9a9075d074d1915ea0cc65e3b07 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 13 Sep 2024 12:22:03 +0530
Subject: [PATCH 1/2] [CodeGen][NewPM] Port EarlyIfConversion pass to NP
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108514
>From 10462c6c2e6b087575d1f8f0c94c38ddebb013a9 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 13 Sep 2024 13:53:01 +0530
Subject: [PATCH] [AMDGPU][NewPM] Fill out addILPOpts.
---
llvm/lib/Ta
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108507
>From e0e4e978c06a2c78b31382274527201e03082e00 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Thu, 12 Sep 2024 23:38:09 +0530
Subject: [PATCH 1/2] [CodeGen][NewPM] Port machine trace metrics analys
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108508
>From dc7a71f17436ab0ce96546cef7639ef2cffd173f Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 13 Sep 2024 12:22:03 +0530
Subject: [PATCH 1/2] [CodeGen][NewPM] Port EarlyIfConversion pass to NP
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108514
>From 0be0bb79f9e6bae184905f753bc5bd5c73eb1e56 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 13 Sep 2024 13:53:01 +0530
Subject: [PATCH] [AMDGPU][NewPM] Fill out addILPOpts.
---
llvm/lib/Ta
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108508
>From f692bb7b707610ebd1ad5f61943802aaef723f67 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 13 Sep 2024 12:22:03 +0530
Subject: [PATCH 1/2] [CodeGen][NewPM] Port EarlyIfConversion pass to NP
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108507
>From eabec10a9a7daf537006ff5d580b798a285e33e3 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Thu, 12 Sep 2024 23:38:09 +0530
Subject: [PATCH 1/4] [CodeGen][NewPM] Port machine trace metrics analys
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/108514
>From 037b15166e575b59e115795e5b4fd8f4065b4483 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Fri, 13 Sep 2024 13:53:01 +0530
Subject: [PATCH] [AMDGPU][NewPM] Fill out addILPOpts.
---
llvm/lib/Ta
@@ -684,8 +684,8 @@ class SIMachineFunctionInfo final : public
AMDGPUMachineFunction,
void setFlag(Register Reg, uint8_t Flag) {
assert(Reg.isVirtual());
-if (VRegFlags.inBounds(Reg))
- VRegFlags[Reg] |= Flag;
+VRegFlags.grow(Reg);
cdevadas
https://github.com/cdevadas approved this pull request.
https://github.com/llvm/llvm-project/pull/110229
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cdevadas wrote:
### Merge activity
* **Oct 16, 3:38 AM EDT**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/108507).
https://github.com/llvm/llvm-project/pull/108507
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cdevadas wrote:
### Merge activity
* **Oct 16, 3:38 AM EDT**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/108514).
https://github.com/llvm/llvm-project/pull/108514
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cdevadas wrote:
### Merge activity
* **Oct 16, 3:38 AM EDT**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/108508).
https://github.com/llvm/llvm-project/pull/108508
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@@ -102,19 +103,22 @@ class MachineTraceMetrics : public MachineFunctionPass {
TargetSchedModel SchedModel;
public:
+ friend class MachineTraceMetricsWrapperPass;
friend class Ensemble;
friend class Trace;
class Ensemble;
- static char ID;
+ // For legacy pas
@@ -684,8 +684,8 @@ class SIMachineFunctionInfo final : public
AMDGPUMachineFunction,
void setFlag(Register Reg, uint8_t Flag) {
assert(Reg.isVirtual());
-if (VRegFlags.inBounds(Reg))
- VRegFlags[Reg] |= Flag;
+VRegFlags.grow(Reg);
cdevadas
@@ -0,0 +1,16 @@
+# RUN: llc -mtriple=amdgcn -run-pass=none -o - %s | FileCheck %s
cdevadas wrote:
Mostly, the tests related to serialize options go in
llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir.
Additionally, a negative test is required for th
https://github.com/cdevadas edited
https://github.com/llvm/llvm-project/pull/114745
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@@ -151,6 +152,7 @@ MACHINE_FUNCTION_PASS("print",
MACHINE_FUNCTION_PASS("print",
MachineDominatorTreePrinterPass(dbgs()))
MACHINE_FUNCTION_PASS("print", MachineLoopPrinterPass(dbgs()))
+MACHINE_FUNCTION_PASS("print",
MachineCycleInfoPrinterPass(dbgs()))
https://github.com/cdevadas commented:
I guess this PR is for porting MachineCycleAnalysis. The run interface for
legacy MachineCycle analysis is missing. The porting for the Print interface
seems complete.
Also, no test/runline to validate the MachineCycle analysis in the NPM path. I
see only
https://github.com/cdevadas created
https://github.com/llvm/llvm-project/pull/117544
The COPY inserted for liverange split during sgpr-regalloc
pipeline currently breaks the BB prolog during the subsequent
vgpr-regalloc phase while spilling and/or splitting the vector
liveranges. This patch fixe
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117544?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/cdevadas ready_for_review
https://github.com/llvm/llvm-project/pull/117544
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https://github.com/cdevadas edited
https://github.com/llvm/llvm-project/pull/116166
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https://github.com/cdevadas commented:
I liked the general direction. Do you have at least one analysis pass ported
using this Getter?
https://github.com/llvm/llvm-project/pull/116166
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@@ -236,6 +238,82 @@ using MachineFunctionPassManager =
PassManager;
/// preserve.
PreservedAnalyses getMachineFunctionPassPreservedAnalyses();
+/// For migrating to new pass manager
cdevadas wrote:
Full stop at the end of the comment.
https://github.com/ll
@@ -236,6 +238,82 @@ using MachineFunctionPassManager =
PassManager;
/// preserve.
PreservedAnalyses getMachineFunctionPassPreservedAnalyses();
+/// For migrating to new pass manager
+/// Provides a common interface to fetch analyses instead of doing it twice in
+/// the *Leg
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