[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)

2025-05-08 Thread Pierre van Houtryve via llvm-branch-commits
https://github.com/Pierre-vh commented: Can you add a testcase in each file with MI flags on the instruction? You have code that preserve flags which needs to be tested https://github.com/llvm/llvm-project/pull/132382 ___ llvm-branch-commits mailing li

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)

2025-05-08 Thread Pierre van Houtryve via llvm-branch-commits
@@ -237,6 +237,21 @@ void RegBankLegalizeHelper::lowerS_BFE(MachineInstr &MI) { MI.eraseFromParent(); } +void RegBankLegalizeHelper::lowerSplitTo32(MachineInstr &MI) { + Register Dst = MI.getOperand(0).getReg(); + LLT Ty = MRI.getType(Dst) == V4S16 ? V2S16 : S32; -

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)

2025-05-08 Thread Pierre van Houtryve via llvm-branch-commits
https://github.com/Pierre-vh edited https://github.com/llvm/llvm-project/pull/132382 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)

2025-05-08 Thread Pierre van Houtryve via llvm-branch-commits
@@ -131,6 +131,40 @@ void RegBankLegalizeHelper::widenLoad(MachineInstr &MI, LLT WideTy, MI.eraseFromParent(); } +void RegBankLegalizeHelper::lowerVccExtToSel(MachineInstr &MI) { + Register Dst = MI.getOperand(0).getReg(); + LLT Ty = MRI.getType(Dst); + Register Src = MI

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for select (PR #132384)

2025-05-08 Thread Pierre van Houtryve via llvm-branch-commits
@@ -485,7 +504,8 @@ LLT RegBankLegalizeHelper::getBTyFromID(RegBankLLTMappingApplyID ID, LLT Ty) { case UniInVgprB64: if (Ty == LLT::scalar(64) || Ty == LLT::fixed_vector(2, 32) || Ty == LLT::fixed_vector(4, 16) || Ty == LLT::pointer(0, 64) || -Ty == LLT:

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for select (PR #132384)

2025-05-08 Thread Pierre van Houtryve via llvm-branch-commits
@@ -286,6 +287,22 @@ void RegBankLegalizeHelper::lowerSplitTo32(MachineInstr &MI) { MI.eraseFromParent(); } +void RegBankLegalizeHelper::lowerSplitTo32Sel(MachineInstr &MI) { + Register Dst = MI.getOperand(0).getReg(); + LLT Ty = MRI.getType(Dst) == V4S16 ? V2S16 : S32; -

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)

2025-05-08 Thread Pierre van Houtryve via llvm-branch-commits
@@ -131,6 +131,40 @@ void RegBankLegalizeHelper::widenLoad(MachineInstr &MI, LLT WideTy, MI.eraseFromParent(); } +void RegBankLegalizeHelper::lowerVccExtToSel(MachineInstr &MI) { + Register Dst = MI.getOperand(0).getReg(); + LLT Ty = MRI.getType(Dst); + Register Src = MI

[llvm-branch-commits] [llvm] [SelectionDAG] Split vector types for atomic load (PR #120640)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
@@ -1421,6 +1424,40 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) { SetSplitVector(SDValue(N, ResNo), Lo, Hi); } +void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD, SDValue &Lo, + SDValue

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for select (PR #132384)

2025-05-08 Thread Pierre van Houtryve via llvm-branch-commits
@@ -198,7 +198,8 @@ UniformityLLTOpPredicateID LLTToBId(LLT Ty) { return B32; if (Ty == LLT::scalar(64) || Ty == LLT::fixed_vector(2, 32) || Ty == LLT::fixed_vector(4, 16) || Ty == LLT::pointer(1, 64) || - Ty == LLT::pointer(4, 64)) + Ty == LLT::pointer(4,

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-08 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 66207ccdf0f96a5836b3bafeb37c90d9a762d944 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] MC: Emit symbols for R_X86_64_PLT32 relocation pointing to symbols with non-zero values. (PR #138795)

2025-05-08 Thread Fangrui Song via llvm-branch-commits
MaskRay wrote: > The alternative fix, which I think I'm now leaning towards, would be to > change how the branch-to-branch optimization handles relocations to > STT_SECTION symbols. A relocation pointing to the STT_SECTION for .text with > addend 1 would be treated as a branch to .text+5 and i

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-08 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 66207ccdf0f96a5836b3bafeb37c90d9a762d944 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-08 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 66207ccdf0f96a5836b3bafeb37c90d9a762d944 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for select (PR #132384)

2025-05-08 Thread Petar Avramovic via llvm-branch-commits
@@ -1390,29 +927,17 @@ legalized: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5 -; FAST-LABEL: name: select_p999_scc_ss -; FAST: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5 -; FAST-NEXT: {{ $}} -; FAST-NEXT: [[COPY:%[0-9]+

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)

2025-05-08 Thread Petar Avramovic via llvm-branch-commits
@@ -341,9 +328,9 @@ body: | ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3 ; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64) ; CHECK-NEXT: [[UV2:%[0-9]+]]:vgpr(s32), [[UV3:%[0-9]+]]:vgpr(s32) = G_UNME

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-08 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From b50f6786084321c6c1402b475b07c998157cd506 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [clang] [libcxx] [lld] [lldb] [llvm] [mlir] [KeyInstr] Add MIR parser support (PR #133494)

2025-05-08 Thread Orlando Cazalet-Hyams via llvm-branch-commits
https://github.com/OCHyams updated https://github.com/llvm/llvm-project/pull/133494 error: too big or took too long to generate ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
@@ -2066,9 +2066,18 @@ bool AtomicExpandImpl::expandAtomicOpToLibcall( I->replaceAllUsesWith(V); } else if (HasResult) { Value *V; -if (UseSizedLibcall) - V = Builder.CreateBitOrPointerCast(Result, I->getType()); -else { +if (UseSizedLibcall) { +

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
@@ -2066,9 +2066,18 @@ bool AtomicExpandImpl::expandAtomicOpToLibcall( I->replaceAllUsesWith(V); } else if (HasResult) { Value *V; -if (UseSizedLibcall) - V = Builder.CreateBitOrPointerCast(Result, I->getType()); -else { +if (UseSizedLibcall) { +

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
@@ -2066,9 +2066,18 @@ bool AtomicExpandImpl::expandAtomicOpToLibcall( I->replaceAllUsesWith(V); } else if (HasResult) { Value *V; -if (UseSizedLibcall) - V = Builder.CreateBitOrPointerCast(Result, I->getType()); -else { +if (UseSizedLibcall) { +

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/120716 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
@@ -151,3 +151,68 @@ define void @pointer_cmpxchg_expand6(ptr addrspace(1) %ptr, ret void } +define <2 x ptr> @atomic_vec2_ptr_align(ptr %x) nounwind { +; CHECK-LABEL: define <2 x ptr> @atomic_vec2_ptr_align( +; CHECK-SAME: ptr [[X:%.*]]) #[[ATTR0:[0-9]+]] { +; CHECK-NEXT:

[llvm-branch-commits] [llvm] [LoopVectorizer] Bundle partial reductions with different extensions (PR #136997)

2025-05-08 Thread Sam Tebbs via llvm-branch-commits
https://github.com/SamTebbs33 updated https://github.com/llvm/llvm-project/pull/136997 >From 10c4727074a7f5b4502ad08dc655be8fa5ffa3d2 Mon Sep 17 00:00:00 2001 From: Samuel Tebbs Date: Wed, 23 Apr 2025 13:16:38 +0100 Subject: [PATCH 1/3] [LoopVectorizer] Bundle partial reductions with different

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm commented: Title seems to not match the implementation anymore https://github.com/llvm/llvm-project/pull/125432 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/li

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bit shifts and sext-inreg (PR #132385)

2025-05-08 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/132385 >From 183f6cc9a037bed5f472be13e32f39002520 Mon Sep 17 00:00:00 2001 From: Petar Avramovic Date: Mon, 14 Apr 2025 16:35:19 +0200 Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for bit s

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bit shifts and sext-inreg (PR #132385)

2025-05-08 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/132385 >From 183f6cc9a037bed5f472be13e32f39002520 Mon Sep 17 00:00:00 2001 From: Petar Avramovic Date: Mon, 14 Apr 2025 16:35:19 +0200 Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for bit s

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)

2025-05-08 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/132383 >From 915bee3729c66b327885838c6384d14f92c2af2d Mon Sep 17 00:00:00 2001 From: Petar Avramovic Date: Thu, 8 May 2025 12:03:28 +0200 Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for extend

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)

2025-05-08 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/132382 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Aria

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/125432 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-08 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From b50f6786084321c6c1402b475b07c998157cd506 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [llvm] [ConstraintElim] Simplify `usub_with_overflow` when A uge B (PR #135785)

2025-05-08 Thread Iris Shi via llvm-branch-commits
https://github.com/el-ev updated https://github.com/llvm/llvm-project/pull/135785 >From d3a9e6efc11df2ef910d7a4d67b6d03204422ec5 Mon Sep 17 00:00:00 2001 From: Iris Shi <0...@owo.li> Date: Tue, 15 Apr 2025 20:20:45 +0800 Subject: [PATCH] [ConstraintElim] Simplify `usub_with_overflow` when A uge

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
@@ -7230,6 +7234,20 @@ static bool findEltLoadSrc(SDValue Elt, LoadSDNode *&Ld, int64_t &ByteOffset) { } } break; + case ISD::EXTRACT_ELEMENT: +if (auto *IdxC = dyn_cast(Elt.getOperand(1))) { arsenm wrote: Pretty sure this must be a constan

[llvm-branch-commits] [NFC][ubsan_minimal] Clang-format a file (PR #139000)

2025-05-08 Thread Vitaly Buka via llvm-branch-commits
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/139000 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [NFC][ubsan_minimal] Clang-format a file (PR #139000)

2025-05-08 Thread Vitaly Buka via llvm-branch-commits
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/139000 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add mandatory parameters for RootConstants (PR #138002)

2025-05-08 Thread Finn Plummer via llvm-branch-commits
https://github.com/inbelic updated https://github.com/llvm/llvm-project/pull/138002 >From 15857bf8e1303e2325b48e417e7abd26aa77910e Mon Sep 17 00:00:00 2001 From: Finn Plummer Date: Wed, 30 Apr 2025 17:53:11 + Subject: [PATCH 1/3] [HLSL][RootSignature] Add mandatory parameters for RootConst

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add optional parameters for RootConstants (PR #138007)

2025-05-08 Thread Finn Plummer via llvm-branch-commits
https://github.com/inbelic updated https://github.com/llvm/llvm-project/pull/138007 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-s

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
@@ -7230,6 +7234,20 @@ static bool findEltLoadSrc(SDValue Elt, LoadSDNode *&Ld, int64_t &ByteOffset) { } } break; + case ISD::EXTRACT_ELEMENT: +if (auto *IdxC = dyn_cast(Elt.getOperand(1))) { arsenm wrote: > If it isn't a constant, shall we

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)

2025-05-08 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/132382 >From e6b6d99ef184920dbc418b7fd8b545b5c6ed59c7 Mon Sep 17 00:00:00 2001 From: Petar Avramovic Date: Thu, 8 May 2025 12:02:27 +0200 Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add parsing for RootFlags (PR #138055)

2025-05-08 Thread Finn Plummer via llvm-branch-commits
https://github.com/inbelic updated https://github.com/llvm/llvm-project/pull/138055 >From 85e92c438ca39c24fdc7840afebd88ebaf025a3c Mon Sep 17 00:00:00 2001 From: Finn Plummer Date: Wed, 30 Apr 2025 23:14:07 + Subject: [PATCH 1/6] pre-req: define missing lexer tokens for flags --- .../clan

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-08 Thread via llvm-branch-commits
@@ -7230,6 +7234,20 @@ static bool findEltLoadSrc(SDValue Elt, LoadSDNode *&Ld, int64_t &ByteOffset) { } } break; + case ISD::EXTRACT_ELEMENT: +if (auto *IdxC = dyn_cast(Elt.getOperand(1))) { jofrn wrote: If it isn't a constant, shall we as

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-08 Thread via llvm-branch-commits
https://github.com/jofrn edited https://github.com/llvm/llvm-project/pull/125432 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [lld] release/20.x: [wasm-ld] Refactor WasmSym from static globals to per-link context (#134970) (PR #137620)

2025-05-08 Thread Anutosh Bhat via llvm-branch-commits
anutosh491 wrote: > If this patch is needed to run your emscripten tests, how did they pass prior > to the llvm 20 upgrade? Hey @sbc100 Not sure you remember but we did disucss a good chunk of this in the issue I had raised https://github.com/llvm/llvm-project/issues/134809 This is exactly

[llvm-branch-commits] [llvm] IR: Remove redundant UseList check in addUse (PR #138676)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/138676 >From dedd3209ffec0129ff862ff8808eacbf13c15688 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 6 May 2025 12:06:17 +0200 Subject: [PATCH] IR: Remove redundant UseList check in addUse Not sure if this di

[llvm-branch-commits] [llvm] IR: Remove redundant UseList check in addUse (PR #138676)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/138676 >From dedd3209ffec0129ff862ff8808eacbf13c15688 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 6 May 2025 12:06:17 +0200 Subject: [PATCH] IR: Remove redundant UseList check in addUse Not sure if this di

[llvm-branch-commits] [llvm] [NFC] Refactoring MCDXBC to support out of order storage of root parameters (PR #137284)

2025-05-08 Thread Finn Plummer via llvm-branch-commits
@@ -6,21 +6,87 @@ // //===--===// +#include "llvm/ADT/STLForwardCompat.h" #include "llvm/BinaryFormat/DXContainer.h" +#include inbelic wrote: nit: to check that all these headers are requi

[llvm-branch-commits] [llvm] [NFC] Refactoring MCDXBC to support out of order storage of root parameters (PR #137284)

2025-05-08 Thread Finn Plummer via llvm-branch-commits
@@ -274,27 +274,37 @@ void DXContainerWriter::writeParts(raw_ostream &OS) { RS.StaticSamplersOffset = P.RootSignature->StaticSamplersOffset; for (const auto &Param : P.RootSignature->Parameters) { -mcdxbc::RootParameter NewParam; -NewParam.Header =

[llvm-branch-commits] [llvm] [NFC] Refactoring MCDXBC to support out of order storage of root parameters (PR #137284)

2025-05-08 Thread via llvm-branch-commits
@@ -274,27 +274,37 @@ void DXContainerWriter::writeParts(raw_ostream &OS) { RS.StaticSamplersOffset = P.RootSignature->StaticSamplersOffset; for (const auto &Param : P.RootSignature->Parameters) { -mcdxbc::RootParameter NewParam; -NewParam.Header =

[llvm-branch-commits] [llvm] [NFC] Refactoring MCDXBC to support out of order storage of root parameters (PR #137284)

2025-05-08 Thread Finn Plummer via llvm-branch-commits
@@ -274,27 +274,37 @@ void DXContainerWriter::writeParts(raw_ostream &OS) { RS.StaticSamplersOffset = P.RootSignature->StaticSamplersOffset; for (const auto &Param : P.RootSignature->Parameters) { -mcdxbc::RootParameter NewParam; -NewParam.Header =

[llvm-branch-commits] [llvm] [GOFF] Add writing of text records (PR #137235)

2025-05-08 Thread Kai Nacke via llvm-branch-commits
https://github.com/redstar updated https://github.com/llvm/llvm-project/pull/137235 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-s

[llvm-branch-commits] [clang] clang: Remove dest LangAS argument from performAddrSpaceCast (PR #138866)

2025-05-08 Thread Yaxun Liu via llvm-branch-commits
https://github.com/yxsamliu approved this pull request. The intention was to make the interface more flexible in cases that a target may want to do some arithmetic directly based on target address space instead of an addrspacecast inst. However, so many years have passed and no target was doin

[llvm-branch-commits] [llvm] [ObjC] Support objc_claimAutoreleasedReturnValue (PR #138696)

2025-05-08 Thread Marina Taylor via llvm-branch-commits
citymarina wrote: Thanks for the feedback, I'm working on an update to address the comments, but currently juggling too many tasks. https://github.com/llvm/llvm-project/pull/138696 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.or

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)

2025-05-08 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/132383 >From 915bee3729c66b327885838c6384d14f92c2af2d Mon Sep 17 00:00:00 2001 From: Petar Avramovic Date: Thu, 8 May 2025 12:03:28 +0200 Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for extend

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Erich Keane via llvm-branch-commits
https://github.com/erichkeane commented: This seems to be reasonable as far as I can tell. I DO wonder if `getOpenMPDirectiveName` should lose non-version overload though, so we make sure we get this right everywhere. https://github.com/llvm/llvm-project/pull/139115 _

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Alexey Bataev via llvm-branch-commits
@@ -94,6 +94,10 @@ struct PrintingPolicy { /// The number of spaces to use to indent each line. unsigned Indentation : 8; + /// Version of the effective OpenMP spec (used to select directive name + /// spelling). + unsigned OpenMP : 8; + alexey-bataev w

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Alexey Bataev via llvm-branch-commits
@@ -965,13 +965,13 @@ void StmtPrinter::VisitOMPTeamsDirective(OMPTeamsDirective *Node) { void StmtPrinter::VisitOMPCancellationPointDirective( OMPCancellationPointDirective *Node) { Indent() << "#pragma omp cancellation point " - << getOpenMPDirectiveName(Node

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
https://github.com/kparzysz updated https://github.com/llvm/llvm-project/pull/139115 >From fa6e19481f448db273f84d270891e737ff021749 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Wed, 7 May 2025 15:32:08 -0500 Subject: [PATCH 1/2] [clang][OpenMP] Pass OpenMP version to getOpenMPDirec

[llvm-branch-commits] [clang] clang: Remove dest LangAS argument from performAddrSpaceCast (PR #138866)

2025-05-08 Thread John McCall via llvm-branch-commits
rjmccall wrote: I would like to continue to traffic in LangAS, if for no other reason than that it promotes better habits within CodeGen. Otherwise, I think we will end up with a lot of code that immediately lowers address spaces, and that will make it very difficult to treat address spaces as

[llvm-branch-commits] [lld] release/20.x: [wasm-ld] Refactor WasmSym from static globals to per-link context (#134970) (PR #137620)

2025-05-08 Thread Sam Clegg via llvm-branch-commits
sbc100 wrote: > > > Do you not build llvm from source in your project? Can't you therefore > > > build from tip-of-tree? > > > > > > Hi, yes I think the latest changes on the release/latest_version.x branch > > is being used for https://github.com/compiler-research/CppInterOp > > (@vgvassile

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
https://github.com/kparzysz updated https://github.com/llvm/llvm-project/pull/139115 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
@@ -965,13 +965,13 @@ void StmtPrinter::VisitOMPTeamsDirective(OMPTeamsDirective *Node) { void StmtPrinter::VisitOMPCancellationPointDirective( OMPCancellationPointDirective *Node) { Indent() << "#pragma omp cancellation point " - << getOpenMPDirectiveName(Node

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
https://github.com/kparzysz updated https://github.com/llvm/llvm-project/pull/139115 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
https://github.com/kparzysz updated https://github.com/llvm/llvm-project/pull/139115 >From fa6e19481f448db273f84d270891e737ff021749 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Wed, 7 May 2025 15:32:08 -0500 Subject: [PATCH 1/6] [clang][OpenMP] Pass OpenMP version to getOpenMPDirec

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
@@ -73,13 +73,16 @@ namespace { PrintingPolicy Policy; std::string NL; const ASTContext *Context; +unsigned Version; kparzysz wrote: Oops, you're right. Removed. https://github.com/llvm/llvm-project/pull/139115 ___

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Alexey Bataev via llvm-branch-commits
https://github.com/alexey-bataev approved this pull request. https://github.com/llvm/llvm-project/pull/139115 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
https://github.com/kparzysz edited https://github.com/llvm/llvm-project/pull/139115 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [flang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139131)

2025-05-08 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-flang-semantics Author: Krzysztof Parzyszek (kparzysz) Changes The OpenMP version is stored in LangOptions in SemanticsContext. Use the fallback version where SemanticsContext is unavailable (mostly in case of debug dumps). RFC: https://discourse.llv

[llvm-branch-commits] [flang] [flang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139131)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
https://github.com/kparzysz updated https://github.com/llvm/llvm-project/pull/139131 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-

[llvm-branch-commits] [llvm] [GOFF] Add writing of text records (PR #137235)

2025-05-08 Thread Kai Nacke via llvm-branch-commits
@@ -571,7 +571,6 @@ void MCObjectFileInfo::initGOFFMCObjectFileInfo(const Triple &T) { GOFF::ESD_LB_Initial, GOFF::ESD_RQ_0, GOFF::ESD_ALIGN_Doubleword, 0}, RootSDSection); - redstar wrote: Fixed. https://github.co

[llvm-branch-commits] [flang] [flang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139131)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
https://github.com/kparzysz updated https://github.com/llvm/llvm-project/pull/139131 >From 9566bf6fd60d2b4f1dac86f6646002b2541e6736 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Wed, 7 May 2025 15:32:28 -0500 Subject: [PATCH 1/4] [flang][OpenMP] Pass OpenMP version to getOpenMPDirec

[llvm-branch-commits] [flang] [flang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139131)

2025-05-08 Thread via llvm-branch-commits
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff HEAD~1 HEAD --extensions h,cpp -- flang/examples/FlangOmpReport/FlangOmpReportVisitor

[llvm-branch-commits] [flang] [flang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139131)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
https://github.com/kparzysz updated https://github.com/llvm/llvm-project/pull/139131 >From 9566bf6fd60d2b4f1dac86f6646002b2541e6736 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Wed, 7 May 2025 15:32:28 -0500 Subject: [PATCH 1/2] [flang][OpenMP] Pass OpenMP version to getOpenMPDirec

[llvm-branch-commits] [BOLT] Compute section utilization in heatmap (PR #139193)

2025-05-08 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-bolt Author: Amir Ayupov (aaupov) Changes Heatmap collects samples grouped by buckets. The size is configurable via `--block-size`, with 64 bytes as the default (X86 cache line size). Define section utilization as the number of buckets mapped to the sec

[llvm-branch-commits] [BOLT] Print .text scores in perf2bolt (PR #139194)

2025-05-08 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov created https://github.com/llvm/llvm-project/pull/139194 Expose heatmap functionality of profile score computation for text section under a new option `--print-heatmap-stats`. This option collects and prints the following stats: - hotness is the percentage of samples a

[llvm-branch-commits] [BOLT] Compute section utilization in heatmap (PR #139193)

2025-05-08 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov created https://github.com/llvm/llvm-project/pull/139193 Heatmap collects samples grouped by buckets. The size is configurable via `--block-size`, with 64 bytes as the default (X86 cache line size). Define section utilization as the number of buckets mapped to the sect

[llvm-branch-commits] [BOLT] Print .text scores in perf2bolt (PR #139194)

2025-05-08 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-bolt Author: Amir Ayupov (aaupov) Changes Expose heatmap functionality of profile score computation for text section under a new option `--print-heatmap-stats`. This option collects and prints the following stats: - hotness is the percentage of samples

[llvm-branch-commits] MC: Emit symbols for R_X86_64_PLT32 relocation pointing to symbols with non-zero values. (PR #138795)

2025-05-08 Thread Peter Collingbourne via llvm-branch-commits
pcc wrote: Abandoning this and will address in the linker change (#138366) instead. https://github.com/llvm/llvm-project/pull/138795 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add optional parameters for RootConstants (PR #138007)

2025-05-08 Thread Ashley Coleman via llvm-branch-commits
@@ -82,6 +82,8 @@ class RootSignatureParser { struct ParsedConstantParams { std::optional Reg; std::optional Num32BitConstants; +std::optional Space; V-FEXrt wrote: Yeah I think I agree with Finn here. Seems to map more directly to the source to

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add optional parameters for RootConstants (PR #138007)

2025-05-08 Thread Ashley Coleman via llvm-branch-commits
@@ -78,6 +78,13 @@ std::optional RootSignatureParser::parseRootConstants() { Constants.Reg = Params->Reg.value(); + // Fill in optional parameters + if (Params->Visibility.has_value()) V-FEXrt wrote: nit: ```suggestion if (Params->Visibility) ``` htt

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add optional parameters for RootConstants (PR #138007)

2025-05-08 Thread Ashley Coleman via llvm-branch-commits
https://github.com/V-FEXrt approved this pull request. https://github.com/llvm/llvm-project/pull/138007 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Form min3/max3 from minimumnum/maximumnum (PR #139137)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: ### Merge activity * **May 9, 2:00 AM EDT**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/139137). https://github.com/llvm/llvm-project/pull/139137 __

[llvm-branch-commits] [llvm] AMDGPU: Add minimumnum/maximumnum tests with amdgpu-ieee=0 (PR #139145)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: ### Merge activity * **May 9, 2:00 AM EDT**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/139145). https://github.com/llvm/llvm-project/pull/139145 __

[llvm-branch-commits] [llvm] AMDGPU: Add baseline tests for min3/max3 from minimumnum/maximumnum (PR #139136)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: ### Merge activity * **May 9, 2:00 AM EDT**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/139136). https://github.com/llvm/llvm-project/pull/139136 __

[llvm-branch-commits] [llvm] AMDGPU: Test more subtargets in minimumnum/maximumnum tests (PR #139144)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: ### Merge activity * **May 9, 2:00 AM EDT**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/139144). https://github.com/llvm/llvm-project/pull/139144 __

[llvm-branch-commits] [llvm] AMDGPU: Handle minimumnum/maximumnum in fneg combines (PR #139133)

2025-05-08 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec approved this pull request. LGTM, although I do not see practical improvements in the tests. https://github.com/llvm/llvm-project/pull/139133 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://li

[llvm-branch-commits] [llvm] AMDGPU: Handle minimumnum/maximumnum in fneg combines (PR #139133)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
@@ -2513,9 +2513,9 @@ define { float, float } @v_fneg_maximumnum_multi_use_maximumnum_f32_ieee(float % ; GCN-LABEL: v_fneg_maximumnum_multi_use_maximumnum_f32_ieee: ; GCN: ; %bb.0: ; GCN-NEXT:s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GCN-NEXT:v_mul_f32_e32 v1, 1

[llvm-branch-commits] [llvm] [NFC] Refactoring MCDXBC to support out of order storage of root parameters (PR #137284)

2025-05-08 Thread Finn Plummer via llvm-branch-commits
@@ -274,27 +274,37 @@ void DXContainerWriter::writeParts(raw_ostream &OS) { RS.StaticSamplersOffset = P.RootSignature->StaticSamplersOffset; for (const auto &Param : P.RootSignature->Parameters) { -mcdxbc::RootParameter NewParam; -NewParam.Header =

[llvm-branch-commits] [clang] [clang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139115)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
@@ -94,6 +94,10 @@ struct PrintingPolicy { /// The number of spaces to use to indent each line. unsigned Indentation : 8; + /// Version of the effective OpenMP spec (used to select directive name + /// spelling). + unsigned OpenMP : 8; + kparzysz wrote:

[llvm-branch-commits] [llvm] AMDGPU: Test more subtargets in minimumnum/maximumnum tests (PR #139144)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/139144?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: Add minimumnum/maximumnum tests with amdgpu-ieee=0 (PR #139145)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/139145?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: Test more subtargets in minimumnum/maximumnum tests (PR #139144)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/139144 None Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,s

[llvm-branch-commits] [llvm] AMDGPU: Add minimumnum/maximumnum tests with amdgpu-ieee=0 (PR #139145)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/139145 With the IEEE bit disabled, the hardware instructions have the same behavior as these operations. >From 207f1fdab531781f5bf3bf7393dd2f8011227321 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 8 May 202

[llvm-branch-commits] [llvm] AMDGPU: Add minimumnum/maximumnum tests with amdgpu-ieee=0 (PR #139145)

2025-05-08 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes With the IEEE bit disabled, the hardware instructions have the same behavior as these operations. --- Patch is 37.84 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-p

[llvm-branch-commits] [llvm] AMDGPU: Test more subtargets in minimumnum/maximumnum tests (PR #139144)

2025-05-08 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes --- Patch is 137.50 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/139144.diff 2 Files Affected: - (modified) llvm/test/CodeGen/AMDGPU/maximumnum.ll

[llvm-branch-commits] [llvm] AMDGPU: Test more subtargets in minimumnum/maximumnum tests (PR #139144)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/139144 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add baseline tests for min3/max3 from minimumnum/maximumnum (PR #139136)

2025-05-08 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec approved this pull request. https://github.com/llvm/llvm-project/pull/139136 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add minimumnum/maximumnum tests with amdgpu-ieee=0 (PR #139145)

2025-05-08 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/139145 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Form min3/max3 from minimumnum/maximumnum (PR #139137)

2025-05-08 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/139137 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Test more subtargets in minimumnum/maximumnum tests (PR #139144)

2025-05-08 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec approved this pull request. https://github.com/llvm/llvm-project/pull/139144 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add minimumnum/maximumnum tests with amdgpu-ieee=0 (PR #139145)

2025-05-08 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec approved this pull request. https://github.com/llvm/llvm-project/pull/139145 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [flang][OpenMP] Pass OpenMP version to getOpenMPDirectiveName (PR #139131)

2025-05-08 Thread Krzysztof Parzyszek via llvm-branch-commits
https://github.com/kparzysz created https://github.com/llvm/llvm-project/pull/139131 The OpenMP version is stored in LangOptions in SemanticsContext. Use the fallback version where SemanticsContext is unavailable (mostly in case of debug dumps). RFC: https://discourse.llvm.org/t/rfc-alternat

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