https://github.com/arichardson updated
https://github.com/llvm/llvm-project/pull/137418
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@@ -252,13 +252,13 @@ define amdgpu_kernel void @indirect_calls_none_agpr(i1
%cond) {
}
-attributes #0 = { "amdgpu-agpr-alloc"="0" }
+attributes #0 = { "amdgpu-no-agpr" }
arsenm wrote:
Broken revert to old attribute
https://github.com/llvm/llvm-project/pu
https://github.com/jofrn edited https://github.com/llvm/llvm-project/pull/120640
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@@ -1421,6 +1424,35 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SetSplitVector(SDValue(N, ResNo), Lo, Hi);
}
+void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD) {
+ SDLoc dl(LD);
+
+ EVT MemoryVT = LD->getMemoryVT();
+ unsigne
@@ -1108,47 +1108,25 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute
{
Function *F = getAssociatedFunction();
auto &InfoCache = static_cast(A.getInfoCache());
-auto TakeRange = [&](std::pair R) {
- auto [Min, Max] = R;
- ConstantRange Range(AP
https://github.com/xlauko created
https://github.com/llvm/llvm-project/pull/138112
- This cleans up moves cir floating point type constraints to dedicated
constraints file, and fixes long double verifier to use constraints directly.
- Renames `CIR_AnyFloat` to `CIR_AnyFloatType`.
This mirrors
@@ -1421,6 +1424,35 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SetSplitVector(SDValue(N, ResNo), Lo, Hi);
}
+void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD) {
+ SDLoc dl(LD);
+
+ EVT MemoryVT = LD->getMemoryVT();
+ unsigne
@@ -1421,6 +1424,35 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SetSplitVector(SDValue(N, ResNo), Lo, Hi);
}
+void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD) {
arsenm wrote:
TokenFactor does not require glue
@@ -0,0 +1,2348 @@
+//===-- LVIRReader.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
https://github.com/andykaylor approved this pull request.
Looks good, with one minor request.
https://github.com/llvm/llvm-project/pull/138112
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@@ -155,21 +153,14 @@ def CIR_LongDouble : CIR_FloatType<"LongDouble",
"long_double"> {
format are all in use.
}];
- let parameters = (ins "mlir::Type":$underlying);
+ let parameters = (ins AnyTypeOf<[CIR_Double, CIR_FP80, CIR_FP128],
+"expects !cir.double, !cir.f
@@ -110,4 +110,35 @@ def CIR_AnyFundamentalSIntType
let cppFunctionName = "isFundamentalSIntType";
}
+//===--===//
+// Float Type predicates
+//===--
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120640
>From 2faa227a87fe9424c4445f2479597329fad666e8 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 16:25:55 -0500
Subject: [PATCH] [SelectionDAG][X86] Split via Concat vector types for
atomic load
Vecto
@@ -1333,6 +1308,56 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+/// The final check and update of the attribute 'amdgpu-waves-per-eu' based on
+/// the determined 'amdgpu-flat-work-group-size' attribute. We can't do this
+/// during attributo
@@ -1108,47 +1108,25 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute
{
Function *F = getAssociatedFunction();
auto &InfoCache = static_cast(A.getInfoCache());
-auto TakeRange = [&](std::pair R) {
- auto [Min, Max] = R;
- ConstantRange Range(AP
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/123995
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@@ -1408,8 +1433,14 @@ static bool runImpl(Module &M, AnalysisGetter &AG,
TargetMachine &TM,
}
}
- ChangeStatus Change = A.run();
- return Change == ChangeStatus::CHANGED;
+ bool Changed = A.run() == ChangeStatus::CHANGED;
shiltian wrote:
I didn't f
@@ -1108,47 +1108,25 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute
{
Function *F = getAssociatedFunction();
auto &InfoCache = static_cast(A.getInfoCache());
-auto TakeRange = [&](std::pair R) {
- auto [Min, Max] = R;
- ConstantRange Range(AP
https://github.com/jmorse commented:
Some initial comments; I made it to about 1000 lines into LVIRReader.cpp.
https://github.com/llvm/llvm-project/pull/135440
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ilovepi wrote:
@PeterChou1 can you provide some context about how you originally expected
these fields to be used/consumed? Here we bake them into the representation and
serialize them, but I don't see any handling of them in the original patch. How
should they be used by the different backend
https://github.com/OCHyams updated
https://github.com/llvm/llvm-project/pull/133481
>From fde8c9e4834a2dad33c1349ef94fc90544a09b65 Mon Sep 17 00:00:00 2001
From: Orlando Cazalet-Hyams
Date: Fri, 21 Mar 2025 16:49:14 +
Subject: [PATCH] [KeyInstr] Inline atom info
Source atom groups are iden
ilovepi wrote:
I appreciate this is a lot of CSS and templates. I have this here in the stack,
so that hopefully I can leverage these to bootstrap unittests for the
HTMLMustacheGenerator in subsequent patches.
https://github.com/llvm/llvm-project/pull/138059
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ilovepi wrote:
Testing in this patch will have to be limited to unit tests, if we can
bootstrap anything at all.
https://github.com/llvm/llvm-project/pull/138060
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ilovepi wrote:
I'm wondering if this should be earlier in the stack to facilitate better
testing.
https://github.com/llvm/llvm-project/pull/138066
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@@ -2066,9 +2066,23 @@ bool AtomicExpandImpl::expandAtomicOpToLibcall(
I->replaceAllUsesWith(V);
} else if (HasResult) {
Value *V;
-if (UseSizedLibcall)
- V = Builder.CreateBitOrPointerCast(Result, I->getType());
-else {
+if (UseSizedLibcall) {
+
@@ -2066,9 +2066,23 @@ bool AtomicExpandImpl::expandAtomicOpToLibcall(
I->replaceAllUsesWith(V);
} else if (HasResult) {
Value *V;
-if (UseSizedLibcall)
- V = Builder.CreateBitOrPointerCast(Result, I->getType());
-else {
+if (UseSizedLibcall) {
+
@@ -1333,6 +1308,56 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+/// The final check and update of the attribute 'amdgpu-waves-per-eu' based on
+/// the determined 'amdgpu-flat-work-group-size' attribute. We can't do this
+/// during attributo
@@ -1408,8 +1433,14 @@ static bool runImpl(Module &M, AnalysisGetter &AG,
TargetMachine &TM,
}
}
- ChangeStatus Change = A.run();
- return Change == ChangeStatus::CHANGED;
+ bool Changed = A.run() == ChangeStatus::CHANGED;
arsenm wrote:
Can this be
@@ -1333,6 +1308,56 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+/// The final check and update of the attribute 'amdgpu-waves-per-eu' based on
+/// the determined 'amdgpu-flat-work-group-size' attribute. We can't do this
+/// during attributo
@@ -1108,47 +1108,25 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute
{
Function *F = getAssociatedFunction();
auto &InfoCache = static_cast(A.getInfoCache());
-auto TakeRange = [&](std::pair R) {
- auto [Min, Max] = R;
- ConstantRange Range(AP
https://github.com/OCHyams updated
https://github.com/llvm/llvm-project/pull/133482
>From 958c0d775bc696df74b847b106ccd2531d5e12e2 Mon Sep 17 00:00:00 2001
From: Orlando Cazalet-Hyams
Date: Mon, 24 Mar 2025 13:48:07 +
Subject: [PATCH] [KeyInstr][SimplifyCFG] Remap atoms when folding br to c
xlauko wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/138112?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/xlauko ready_for_review
https://github.com/llvm/llvm-project/pull/138112
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llvmbot wrote:
@llvm/pr-subscribers-clangir
Author: Henrich Lauko (xlauko)
Changes
- This cleans up moves cir floating point type constraints to dedicated
constraints file, and fixes long double verifier to use constraints directly.
- Renames `CIR_AnyFloat` to `CIR_AnyFloatType`.
This mi
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Henrich Lauko (xlauko)
Changes
- This cleans up moves cir floating point type constraints to dedicated
constraints file, and fixes long double verifier to use constraints directly.
- Renames `CIR_AnyFloat` to `CIR_AnyFloatType`.
This mirr
https://github.com/xlauko updated
https://github.com/llvm/llvm-project/pull/138112
Rate limit ยท GitHub
body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
UI,Helvetica,Arial,sans-se
@@ -1421,6 +1424,35 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SetSplitVector(SDValue(N, ResNo), Lo, Hi);
}
+void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD) {
+ SDLoc dl(LD);
+
+ EVT MemoryVT = LD->getMemoryVT();
+ unsigne
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/138142
Backport c91c3f930cfc75eb4e8b623ecd59c807863aa6c0
Requested by: @rj-jesus
>From ed9883341726233dec2a9b805ac4f411a17a374e Mon Sep 17 00:00:00 2001
From: Ricardo Jesus
Date: Wed, 30 Apr 2025 08:22:38 +0100
Subje
llvmbot wrote:
@nikic What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/138142
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llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: None (llvmbot)
Changes
Backport c91c3f930cfc75eb4e8b623ecd59c807863aa6c0
Requested by: @rj-jesus
---
Full diff: https://github.com/llvm/llvm-project/pull/138142.diff
2 Files Affected:
- (modified) llvm/lib/Transforms/InstComb
https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/138142
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@@ -1421,6 +1424,35 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SetSplitVector(SDValue(N, ResNo), Lo, Hi);
}
+void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD) {
+ SDLoc dl(LD);
+
+ EVT MemoryVT = LD->getMemoryVT();
+ unsigne
https://github.com/aaupov created
https://github.com/llvm/llvm-project/pull/138181
Trace is a triple of (branch source, branch target, fallthrough end),
introduced in https://github.com/llvm/llvm-project/pull/127125.
Use traces throughout branch profile handling, unifying perf parsing
and pre-a
@@ -1421,6 +1424,35 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SetSplitVector(SDValue(N, ResNo), Lo, Hi);
}
+void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD) {
jofrn wrote:
EXTRACT_SUBVECTOR does not have cha
https://github.com/jofrn edited https://github.com/llvm/llvm-project/pull/120640
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@@ -1421,6 +1424,35 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N,
unsigned ResNo) {
SetSplitVector(SDValue(N, ResNo), Lo, Hi);
}
+void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD) {
+ SDLoc dl(LD);
+
+ EVT MemoryVT = LD->getMemoryVT();
+ unsigne
Author: Anshil Gandhi
Date: 2025-05-01T12:09:08-04:00
New Revision: e8e1d2cd5b345070ed2aba7977685e18bbe0c594
URL:
https://github.com/llvm/llvm-project/commit/e8e1d2cd5b345070ed2aba7977685e18bbe0c594
DIFF:
https://github.com/llvm/llvm-project/commit/e8e1d2cd5b345070ed2aba7977685e18bbe0c594.diff
@@ -4,17 +4,17 @@
declare void @llvm.memcpy.p1.p4.i32(ptr addrspace(1) nocapture, ptr
addrspace(4) nocapture, i32, i1) #0
-@lds.i32 = unnamed_addr addrspace(3) global i32 poison, align 4
-@lds.arr = unnamed_addr addrspace(3) global [256 x i32] poison, align 4
+@lds.i32 = unn
https://github.com/arsenm edited
https://github.com/llvm/llvm-project/pull/123995
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@@ -1333,6 +1308,56 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+/// The final check and update of the attribute 'amdgpu-waves-per-eu' based on
+/// the determined 'amdgpu-flat-work-group-size' attribute. We can't do this
+/// during attributo
@@ -2056,55 +2056,6 @@ class VPReductionPHIRecipe : public VPHeaderPHIRecipe,
}
};
-/// A recipe for forming partial reductions. In the loop, an accumulator and
SamTebbs33 wrote:
I've pre-committed the NFC but rebasing Elvis's changes on top of that has bee
@@ -4923,9 +4923,7 @@ InstructionCost AArch64TTIImpl::getPartialReductionCost(
return Invalid;
break;
case 16:
- if (AccumEVT == MVT::i64)
-Cost *= 2;
- else if (AccumEVT != MVT::i32)
+ if (AccumEVT != MVT::i32)
MacDue w
@@ -1200,6 +1200,13 @@ def : Pat<(i16 (atomic_load_16 addr:$src)), (MOV16rm
addr:$src)>;
def : Pat<(i32 (atomic_load_32 addr:$src)), (MOV32rm addr:$src)>;
def : Pat<(i64 (atomic_load_64 addr:$src)), (MOV64rm addr:$src)>;
+def : Pat<(v4i32 (scalar_to_vector (i32 (anyext (i16 (
@@ -2066,9 +2066,23 @@ bool AtomicExpandImpl::expandAtomicOpToLibcall(
I->replaceAllUsesWith(V);
} else if (HasResult) {
Value *V;
-if (UseSizedLibcall)
- V = Builder.CreateBitOrPointerCast(Result, I->getType());
-else {
+if (UseSizedLibcall) {
+
@@ -4923,9 +4923,7 @@ InstructionCost AArch64TTIImpl::getPartialReductionCost(
return Invalid;
break;
case 16:
- if (AccumEVT == MVT::i64)
-Cost *= 2;
- else if (AccumEVT != MVT::i32)
+ if (AccumEVT != MVT::i32)
SamTebbs
https://github.com/OCHyams updated
https://github.com/llvm/llvm-project/pull/133481
>From fde8c9e4834a2dad33c1349ef94fc90544a09b65 Mon Sep 17 00:00:00 2001
From: Orlando Cazalet-Hyams
Date: Fri, 21 Mar 2025 16:49:14 +
Subject: [PATCH 1/2] [KeyInstr] Inline atom info
Source atom groups are
https://github.com/OCHyams updated
https://github.com/llvm/llvm-project/pull/133480
>From 2c538d7ba71f82c49800331d996316a96696aee2 Mon Sep 17 00:00:00 2001
From: Orlando Cazalet-Hyams
Date: Fri, 21 Mar 2025 11:52:30 +
Subject: [PATCH] [KeyInstr] Merge atoms in DILocation::getMergedLocation
Author: Vlad Serebrennikov
Date: 2025-05-01T18:10:57+04:00
New Revision: 08f8efd49c7043fc8bda811041168106009612e9
URL:
https://github.com/llvm/llvm-project/commit/08f8efd49c7043fc8bda811041168106009612e9
DIFF:
https://github.com/llvm/llvm-project/commit/08f8efd49c7043fc8bda811041168106009612e9.
@@ -82,6 +82,8 @@ class RootSignatureParser {
struct ParsedConstantParams {
std::optional Reg;
std::optional Num32BitConstants;
+std::optional Space;
joaosaffran wrote:
Space is used whenever we have registers, shouldn't this be an optional field
@@ -255,7 +255,9 @@ TEST_F(ParseHLSLRootSignatureTest, ValidSamplerFlagsTest) {
TEST_F(ParseHLSLRootSignatureTest, ValidParseRootConsantsTest) {
joaosaffran wrote:
I would suggest having tests cases for mandatory and optional fields. Also test
cases to verify t
https://github.com/joaosaffran commented:
Can we add tests to verify error scenarios as well?
https://github.com/llvm/llvm-project/pull/138002
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https://github.com/nikic approved this pull request.
https://github.com/llvm/llvm-project/pull/138142
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https://github.com/OCHyams updated
https://github.com/llvm/llvm-project/pull/133480
>From 2c538d7ba71f82c49800331d996316a96696aee2 Mon Sep 17 00:00:00 2001
From: Orlando Cazalet-Hyams
Date: Fri, 21 Mar 2025 11:52:30 +
Subject: [PATCH 1/3] [KeyInstr] Merge atoms in DILocation::getMergedLocat
@@ -0,0 +1,300 @@
+//===-- LVIRReader.h *- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -728,14 +514,16 @@ void LVDWARFReader::createLineAndFileRecords(
for (const DWARFDebugLine::FileNameEntry &Entry :
Lines->Prologue.FileNames) {
std::string Directory;
- if (Lines->getDirectoryForEntry(Entry, Directory))
-Directory = transformP
@@ -0,0 +1,2348 @@
+//===-- LVIRReader.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
@@ -0,0 +1,300 @@
+//===-- LVIRReader.h *- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,2348 @@
+//===-- LVIRReader.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
@@ -2124,6 +2125,138 @@ layout and given the number of matches.
-
Total 71 8
+IR (Textual representation and bitcode) SUPPORT
+~~~
+The below example is used to show the IR output ge
@@ -0,0 +1,300 @@
+//===-- LVIRReader.h *- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,2348 @@
+//===-- LVIRReader.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
@@ -56,6 +61,17 @@ Error LVReaderHandler::createReader(StringRef Filename,
LVReaders &Readers,
return std::make_unique(Filename, FileFormatName, Pdb,
W, ExePath);
}
+if (isa(Input)) {
+ IRObjectFile *Ir = cast(
https://github.com/jmorse edited
https://github.com/llvm/llvm-project/pull/135440
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@@ -0,0 +1,300 @@
+//===-- LVIRReader.h *- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -29,7 +30,9 @@ namespace logicalview {
using LVReaders = std::vector>;
using ArgVector = std::vector;
-using PdbOrObj = PointerUnion;
+using PdbOrObjOrIr =
+PointerUnion;
jmorse wrote:
I feel we should be able to invent a more symbolic name for this ty
@@ -0,0 +1,300 @@
+//===-- LVIRReader.h *- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,2348 @@
+//===-- LVIRReader.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
@@ -0,0 +1,2348 @@
+//===-- LVIRReader.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
@@ -0,0 +1,300 @@
+//===-- LVIRReader.h *- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,2348 @@
+//===-- LVIRReader.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
@@ -0,0 +1,2348 @@
+//===-- LVIRReader.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
@@ -0,0 +1,2348 @@
+//===-- LVIRReader.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: A
@@ -1333,6 +1308,56 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+/// The final check and update of the attribute 'amdgpu-waves-per-eu' based on
+/// the determined 'amdgpu-flat-work-group-size' attribute. We can't do this
+/// during attributo
https://github.com/arsenm commented:
Tests look like they were reverted to some old revision and lost updates
https://github.com/llvm/llvm-project/pull/123995
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@@ -1408,8 +1433,14 @@ static bool runImpl(Module &M, AnalysisGetter &AG,
TargetMachine &TM,
}
}
- ChangeStatus Change = A.run();
- return Change == ChangeStatus::CHANGED;
+ bool Changed = A.run() == ChangeStatus::CHANGED;
+
+ if (Changed && (LTOPhase == ThinOrFullL
https://github.com/OCHyams updated
https://github.com/llvm/llvm-project/pull/133478
>From 511ee0a22ab388a8794dd4f487a23615eb4ad800 Mon Sep 17 00:00:00 2001
From: Orlando Cazalet-Hyams
Date: Tue, 18 Mar 2025 16:50:17 +
Subject: [PATCH 1/5] [KeyInstr] Add Atom Group waterline to LLVMContext
https://github.com/OCHyams updated
https://github.com/llvm/llvm-project/pull/133480
>From 2c538d7ba71f82c49800331d996316a96696aee2 Mon Sep 17 00:00:00 2001
From: Orlando Cazalet-Hyams
Date: Fri, 21 Mar 2025 11:52:30 +
Subject: [PATCH 1/4] [KeyInstr] Merge atoms in DILocation::getMergedLocat
OCHyams wrote:
@SLTozer are you happy with my responses to your inline comments? And a few
weeks ago offline we discussed that the slightly not-nfc change to preserve
isImplicitCode is probably ok. Are you still happy with that?
@jmorse I used some early-exits in the lambda - does that look ok
@@ -121,7 +121,24 @@ class LVReader {
#undef LV_OBJECT_ALLOCATOR
+ // Scopes with ranges for current compile unit. It is used to find a line
jmorse wrote:
(for the benefit of any other reviewers, these have been hoisted out of the
object-file and DWARF rea
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff HEAD~1 HEAD --extensions h,cpp --
bolt/include/bolt/Profile/DataAggregator.h bolt/lib
@@ -255,7 +255,9 @@ TEST_F(ParseHLSLRootSignatureTest, ValidSamplerFlagsTest) {
TEST_F(ParseHLSLRootSignatureTest, ValidParseRootConsantsTest) {
inbelic wrote:
Sure, I can add more. Just wasn't sure what the right balance is, as many of
the error reports are al
@@ -82,6 +82,8 @@ class RootSignatureParser {
struct ParsedConstantParams {
std::optional Reg;
std::optional Num32BitConstants;
+std::optional Space;
inbelic wrote:
I think having it separate maps closer and clearer to the metadata and
parameter
@@ -5096,6 +5097,23 @@ void Verifier::visitCallsiteMetadata(Instruction &I,
MDNode *MD) {
visitCallStackMetadata(MD);
}
+void Verifier::visitCalleeTypeMetadata(Instruction &I, MDNode *MD) {
+ Check(isa(I), "!callee_type metadata should only exist on calls",
+&I);
+
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