zmodem wrote:
@tru can I do something to help get that release note ^ into the release?
https://github.com/llvm/llvm-project/pull/106546
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/list
tru wrote:
> @tru can I do something to help get that release note ^ into the release?
I think for the initial release we'll just use the release notes document in
the docs folder as usual. So I would add it to LLVM release notes and give me
PR for that.
https://github.com/llvm/llvm-project/p
https://github.com/zmodem milestoned
https://github.com/llvm/llvm-project/pull/107826
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/zmodem created
https://github.com/llvm/llvm-project/pull/107826
LLVM_TARGETS_TO_BUILD was set in #106059
>From d5d63953da88af4c6f09d0f97edaa92f8a326e09 Mon Sep 17 00:00:00 2001
From: Hans Wennborg
Date: Mon, 9 Sep 2024 10:56:37 +0200
Subject: [PATCH] Release note about targe
https://github.com/zmodem edited
https://github.com/llvm/llvm-project/pull/107826
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
zmodem wrote:
Sent https://github.com/llvm/llvm-project/pull/107826
https://github.com/llvm/llvm-project/pull/106546
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-com
https://github.com/tru approved this pull request.
https://github.com/llvm/llvm-project/pull/107826
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
zmodem wrote:
I think you need to push the merge button, I don't have permission.
https://github.com/llvm/llvm-project/pull/107826
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/l
https://github.com/steakhal milestoned
https://github.com/llvm/llvm-project/pull/107841
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/steakhal created
https://github.com/llvm/llvm-project/pull/107841
Backports the fix for #107724.
(cherry picked from commit d84d9559bdc7aeb4ce14c251f6a3490c66db8d3a)
>From f791ef134479616ced3d90c5321ecb878c5b6efc Mon Sep 17 00:00:00 2001
From: Nicolas van Kempen
Date: Mon,
https://github.com/steakhal edited
https://github.com/llvm/llvm-project/pull/107841
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@llvm/pr-subscribers-clang-static-analyzer-1
Author: Balazs Benics (steakhal)
Changes
Backports the fix for #107724.
(cherry picked from commit d84d9559bdc7aeb4ce14c251f6a3490c66db8d3a)
---
Full diff: https://github.com/llvm/llvm-project/pull/107841.diff
2 Files Affected
steakhal wrote:
There is no need to update the release notes as `#embed` is a new feature, so
the crash is not a regression that needs to be highlighted.
https://github.com/llvm/llvm-project/pull/107841
___
llvm-branch-commits mailing list
llvm-branch
https://github.com/NagyDonat approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/107841
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
skatrak wrote:
Sorry for the delay getting back to this! I don't have any remaining blocking
concerns with your proposal, but I think it would be good if others shared
their opinions before proceeding with this approach.
https://github.com/llvm/llvm-project/pull/101445
https://github.com/Xazax-hun approved this pull request.
LGTM!
https://github.com/llvm/llvm-project/pull/107841
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/wangpc-pp edited
https://github.com/llvm/llvm-project/pull/107548
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/107548
>From f21cfcfc90330ee3856746b6315a81a00313b0e0 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Fri, 6 Sep 2024 17:20:51 +0800
Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=
https://github.com/tblah approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/101445
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -0,0 +1,932 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -O2 | FileCheck %s
--check-prefix=CHECK-ALIGNED-RV32
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/107548
>From f21cfcfc90330ee3856746b6315a81a00313b0e0 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Fri, 6 Sep 2024 17:20:51 +0800
Subject: [PATCH 1/3] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=
@@ -2113,3 +2113,18 @@ bool RISCVTTIImpl::shouldConsiderAddressTypePromotion(
}
return Considerable;
}
+
+RISCVTTIImpl::TTI::MemCmpExpansionOptions
+RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
+ TTI::MemCmpExpansionOptions Options;
+ // FIXME
https://github.com/wangpc-pp updated
https://github.com/llvm/llvm-project/pull/107548
>From f21cfcfc90330ee3856746b6315a81a00313b0e0 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng
Date: Fri, 6 Sep 2024 17:20:51 +0800
Subject: [PATCH 1/4] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=
@@ -2113,3 +2113,18 @@ bool RISCVTTIImpl::shouldConsiderAddressTypePromotion(
}
return Considerable;
}
+
+RISCVTTIImpl::TTI::MemCmpExpansionOptions
+RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
+ TTI::MemCmpExpansionOptions Options;
+ // FIXME
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/107886
Backport 3cdb30e
Requested by: @cor3ntin
>From e64fc4127deca57ace68d7ad634b926d10858ab5 Mon Sep 17 00:00:00 2001
From: Krystian Stasiowski
Date: Mon, 9 Sep 2024 12:06:45 -0400
Subject: [PATCH] [Clang][Sema] Us
https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/107886
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@cor3ntin What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/107886
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/list
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: None (llvmbot)
Changes
Backport 3cdb30e
Requested by: @cor3ntin
---
Full diff: https://github.com/llvm/llvm-project/pull/107886.diff
5 Files Affected:
- (modified) clang/include/clang/Sema/Sema.h (+3-3)
- (modified) clang/lib/Sema/Sem
prj- wrote:
Any hope that this gets reviewed and merged for the release?
https://github.com/llvm/llvm-project/pull/107531
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branc
tru wrote:
Yeah I'll merge it - I just do it in batches when I have time to review and
integrate them all (I can't use the merge button either - you have to do it
with a script ... due to reasons ...)
https://github.com/llvm/llvm-project/pull/107826
Author: Zequan Wu
Date: 2024-09-09T14:33:27-04:00
New Revision: 1b8479684c74caa82e0b5192a780b75f1000a9c2
URL:
https://github.com/llvm/llvm-project/commit/1b8479684c74caa82e0b5192a780b75f1000a9c2
DIFF:
https://github.com/llvm/llvm-project/commit/1b8479684c74caa82e0b5192a780b75f1000a9c2.diff
LOG
https://github.com/damyanp edited
https://github.com/llvm/llvm-project/pull/104252
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/damyanp approved this pull request.
LGTM, some nits.
https://github.com/llvm/llvm-project/pull/104252
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch
@@ -267,45 +267,38 @@ Examples:
@llvm.dx.handle.fromHeap.tdx.RawBuffer_v4f32_1_0(
i32 2, i1 false)
-Buffer Loads and Stores
-
-*relevant types: Buffers*
-
-We need to treat buffer loads and stores from "dx.TypedBuffer"
@@ -30,6 +30,9 @@ def int_dx_handle_fromBinding
[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty],
[IntrNoMem]>;
+def int_dx_typedBufferLoad
damyanp wrote:
Should I expect to find the `checkbit` version in here as well?
htt
@@ -259,6 +259,114 @@ class OpLowerer {
lowerToBindAndAnnotateHandle(F);
}
+ /// Replace uses of \c V with the values in the `dx.ResRet` of \c Op. Since
we
damyanp wrote:
What is `V` in this context?
https://github.com/llvm/llvm-project/pull/104252
@@ -450,6 +462,10 @@ CallInst *DXILOpBuilder::createOp(dxil::OpCode OpCode,
ArrayRef Args,
return *Result;
}
+StructType *DXILOpBuilder::getResRetType(Type *ElementTy) {
+ return ::getResRetType(ElementTy);
damyanp wrote:
Trying to understand this pattern
@@ -259,6 +259,114 @@ class OpLowerer {
lowerToBindAndAnnotateHandle(F);
}
+ /// Replace uses of \c V with the values in the `dx.ResRet` of \c Op. Since
we
+ /// expect to be post-scalarization, make an effort to avoid vectors.
+ Error replaceResRetUses(CallInst *I
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -30,6 +30,9 @@ def int_dx_handle_fromBinding
[llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i1_ty],
[IntrNoMem]>;
+def int_dx_typedBufferLoad
bogner wrote:
No, I plan to add that in a follow up.
https://github.com/llvm/llvm-
@@ -450,6 +462,10 @@ CallInst *DXILOpBuilder::createOp(dxil::OpCode OpCode,
ArrayRef Args,
return *Result;
}
+StructType *DXILOpBuilder::getResRetType(Type *ElementTy) {
+ return ::getResRetType(ElementTy);
bogner wrote:
This pattern isn't great, and I ex
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/104252
>From 2f317012985068f7130cdf4976d8821924d404c3 Mon Sep 17 00:00:00 2001
From: Justin Bogner
Date: Mon, 9 Sep 2024 12:16:36 -0700
Subject: [PATCH] Improve comments, move code for clarity
Created using spr 1.3.5-b
@@ -267,45 +267,38 @@ Examples:
@llvm.dx.handle.fromHeap.tdx.RawBuffer_v4f32_1_0(
i32 2, i1 false)
-Buffer Loads and Stores
-
-*relevant types: Buffers*
-
-We need to treat buffer loads and stores from "dx.TypedBuffer"
@@ -259,6 +259,114 @@ class OpLowerer {
lowerToBindAndAnnotateHandle(F);
}
+ /// Replace uses of \c V with the values in the `dx.ResRet` of \c Op. Since
we
bogner wrote:
Nice catch, should be "Intrin", the name of the first parameter. Updated.
http
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/104252
>From 2f317012985068f7130cdf4976d8821924d404c3 Mon Sep 17 00:00:00 2001
From: Justin Bogner
Date: Mon, 9 Sep 2024 12:16:36 -0700
Subject: [PATCH 1/2] Improve comments, move code for clarity
Created using spr 1.3
@@ -259,6 +259,114 @@ class OpLowerer {
lowerToBindAndAnnotateHandle(F);
}
+ /// Replace uses of \c V with the values in the `dx.ResRet` of \c Op. Since
we
+ /// expect to be post-scalarization, make an effort to avoid vectors.
+ Error replaceResRetUses(CallInst *I
@@ -289,6 +289,43 @@ class OpLowerer {
});
}
+ void lowerTypedBufferStore(Function &F) {
+IRBuilder<> &IRB = OpBuilder.getIRB();
+Type *Int8Ty = IRB.getInt8Ty();
+Type *Int32Ty = IRB.getInt32Ty();
+
+replaceFunction(F, [&](CallInst *CI) -> Error {
+
bogner wrote:
Please take another look - specifically I'd like some review on the doc changes
to make sure they're clear.
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://
https://github.com/damyanp approved this pull request.
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -388,10 +432,13 @@ class OpLowerer {
case Intrinsic::dx_typedBufferLoad:
lowerTypedBufferLoad(F);
break;
+ case Intrinsic::dx_typedBufferStore:
+lowerTypedBufferStore(F);
+break;
}
Updated = true;
}
-if (Updat
@@ -388,10 +432,13 @@ class OpLowerer {
case Intrinsic::dx_typedBufferLoad:
lowerTypedBufferLoad(F);
break;
+ case Intrinsic::dx_typedBufferStore:
+lowerTypedBufferStore(F);
+break;
}
Updated = true;
}
-if (Updat
@@ -1784,53 +1799,53 @@ def NVVM_CpAsyncBulkWaitGroupOp :
NVVM_Op<"cp.async.bulk.wait_group">,
}];
}
-def NVVM_CpAsyncBulkTensorGlobalToSharedClusterOp :
- NVVM_Op<"cp.async.bulk.tensor.shared.cluster.global",
- [DeclareOpInterfaceMethods,
+def NVVM_CpAsyncBulkTensorGl
@@ -209,7 +209,12 @@ struct GPULaneIdOpToNVVM :
ConvertOpToLLVMPattern {
ConversionPatternRewriter &rewriter) const override {
auto loc = op->getLoc();
MLIRContext *context = rewriter.getContext();
-Value newOp = rewriter.create(loc, rewriter.getI
@@ -699,9 +699,21 @@ gpu.module @test_module_32 {
}
gpu.module @test_module_33 {
-// CHECK-LABEL: func @kernel_with_block_size()
-// CHECK: attributes {gpu.kernel, gpu.known_block_size = array, nvvm.kernel, nvvm.maxntid = array}
- gpu.func @kernel_with_block_size() kernel att
@@ -361,11 +361,60 @@ Examples:
- ``i32``
- Index into the buffer
+Texture and Typed Buffer Stores
+---
+
+*relevant types: Textures and TypedBuffer*
+
+The `TextureStore`_ and `BufferStore`_ DXIL operations can only be used to
---
@@ -361,11 +361,60 @@ Examples:
- ``i32``
- Index into the buffer
+Texture and Typed Buffer Stores
+---
+
+*relevant types: Textures and TypedBuffer*
+
+The `TextureStore`_ and `BufferStore`_ DXIL operations can only be used to
+write all
@@ -361,11 +361,60 @@ Examples:
- ``i32``
- Index into the buffer
+Texture and Typed Buffer Stores
+---
+
+*relevant types: Textures and TypedBuffer*
+
+The `TextureStore`_ and `BufferStore`_ DXIL operations can only be used to
+write all
@@ -361,11 +361,60 @@ Examples:
- ``i32``
- Index into the buffer
+Texture and Typed Buffer Stores
+---
+
+*relevant types: Textures and TypedBuffer*
+
+The `TextureStore`_ and `BufferStore`_ DXIL operations can only be used to
+write all
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/krzysz00 updated
https://github.com/llvm/llvm-project/pull/107659
>From c7d3804afe9a7e6325f6af230f060c19aceca09b Mon Sep 17 00:00:00 2001
From: Krzysztof Drewniak
Date: Fri, 6 Sep 2024 23:45:52 +
Subject: [PATCH 1/3] [mlir][GPU] Plumb range information through the NVVM
l
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/107938
Backport adf44d5c3ea03569f019740e1140c3205810b3fa
Requested by: @tstellar
>From ceccb786ea6247de6681ba5c37289305f06d2a08 Mon Sep 17 00:00:00 2001
From: Tom Stellard
Date: Fri, 6 Sep 2024 17:05:32 -0700
Subject
https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/107938
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@felipepiovezan What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/107938
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailma
llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: None (llvmbot)
Changes
Backport adf44d5c3ea03569f019740e1140c3205810b3fa
Requested by: @tstellar
---
Full diff: https://github.com/llvm/llvm-project/pull/107938.diff
3 Files Affected:
- (modified)
lldb/test/API/commands/expression/impo
@@ -94,6 +95,7 @@ class OpLowerer {
DiagnosticInfoUnsupported Diag(*CI->getFunction(), Message,
CI->getDebugLoc());
M.getContext().diagnose(Diag);
+HasErrors = true;
farzonl wrote:
`HasErrors ` upd
https://github.com/vitalybuka created
https://github.com/llvm/llvm-project/pull/107941
None
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@llvm/pr-subscribers-compiler-rt-sanitizer
Author: Vitaly Buka (vitalybuka)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/107941.diff
1 Files Affected:
- (modified) compiler-rt/lib/sanitizer_common/sanitizer_tls_get_addr.cpp (+4)
``diff
dif
https://github.com/vitalybuka updated
https://github.com/llvm/llvm-project/pull/107941
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -289,6 +289,43 @@ class OpLowerer {
});
}
+ void lowerTypedBufferStore(Function &F) {
+IRBuilder<> &IRB = OpBuilder.getIRB();
+Type *Int8Ty = IRB.getInt8Ty();
+Type *Int32Ty = IRB.getInt32Ty();
+
+replaceFunction(F, [&](CallInst *CI) -> Error {
--
https://github.com/vitalybuka updated
https://github.com/llvm/llvm-project/pull/107941
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/farzonl approved this pull request.
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/hekota approved this pull request.
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -289,6 +289,43 @@ class OpLowerer {
});
}
+ void lowerTypedBufferStore(Function &F) {
+IRBuilder<> &IRB = OpBuilder.getIRB();
+Type *Int8Ty = IRB.getInt8Ty();
+Type *Int32Ty = IRB.getInt32Ty();
+
+replaceFunction(F, [&](CallInst *CI) -> Error {
--
@@ -289,6 +289,43 @@ class OpLowerer {
});
}
+ void lowerTypedBufferStore(Function &F) {
+IRBuilder<> &IRB = OpBuilder.getIRB();
+Type *Int8Ty = IRB.getInt8Ty();
+Type *Int32Ty = IRB.getInt32Ty();
+
+replaceFunction(F, [&](CallInst *CI) -> Error {
--
https://github.com/farzonl edited
https://github.com/llvm/llvm-project/pull/104253
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -94,6 +95,7 @@ class OpLowerer {
DiagnosticInfoUnsupported Diag(*CI->getFunction(), Message,
CI->getDebugLoc());
M.getContext().diagnose(Diag);
+HasErrors = true;
bogner wrote:
Even if we did pa
@@ -289,6 +289,43 @@ class OpLowerer {
});
}
+ void lowerTypedBufferStore(Function &F) {
+IRBuilder<> &IRB = OpBuilder.getIRB();
+Type *Int8Ty = IRB.getInt8Ty();
+Type *Int32Ty = IRB.getInt32Ty();
+
+replaceFunction(F, [&](CallInst *CI) -> Error {
--
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/104253
>From d49a863313c30d3e75205dbffddc8f81980ed25b Mon Sep 17 00:00:00 2001
From: Justin Bogner
Date: Mon, 9 Sep 2024 17:55:15 -0700
Subject: [PATCH] Propagate HasErrors through return values
Created using spr 1.3.5
@@ -94,6 +95,7 @@ class OpLowerer {
DiagnosticInfoUnsupported Diag(*CI->getFunction(), Message,
CI->getDebugLoc());
M.getContext().diagnose(Diag);
+HasErrors = true;
bogner wrote:
I pushed the `boo
https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/107945
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@wangleiat What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/107945
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/lis
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/107945
Backport a111f9119a5ec77c19a514ec09454218f739454f
Requested by: @dtcxzyw
>From 7b4ab2233655a30cf04d52ba98a707d1b6cb3036 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 10 Sep 2024 09:19:39 +0800
Subjec
llvmbot wrote:
@llvm/pr-subscribers-backend-loongarch
Author: None (llvmbot)
Changes
Backport a111f9119a5ec77c19a514ec09454218f739454f
Requested by: @dtcxzyw
---
Full diff: https://github.com/llvm/llvm-project/pull/107945.diff
2 Files Affected:
- (modified) llvm/lib/Target/LoongArch/L
https://github.com/wangleiat approved this pull request.
https://github.com/llvm/llvm-project/pull/107945
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/107948
Backport 1ca411ca451e0e86caf9207779616f32ed9fd908
Requested by: @wangleiat
>From 9cd12fa1c545bea1c61bb1d85b451b5f391aac4e Mon Sep 17 00:00:00 2001
From: wanglei
Date: Tue, 10 Sep 2024 09:28:15 +0800
Subject: [
llvmbot wrote:
@SixWeining What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/107948
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/li
llvmbot wrote:
@llvm/pr-subscribers-backend-loongarch
Author: None (llvmbot)
Changes
Backport 1ca411ca451e0e86caf9207779616f32ed9fd908
Requested by: @wangleiat
---
Full diff: https://github.com/llvm/llvm-project/pull/107948.diff
3 Files Affected:
- (modified) llvm/lib/Target/LoongArch
https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/107948
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/SixWeining approved this pull request.
https://github.com/llvm/llvm-project/pull/107948
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
JDevlieghere wrote:
I'm supportive of merging this but only once we've decorated the test
accordingly (CC @Michael137). Currently this causes a test failure on Apple
Silicon:
https://ci.swift.org/view/all/job/llvm.org/view/LLDB/job/as-lldb-cmake/
https://github.com/llvm/llvm-project/pull/107
https://github.com/aaupov created
https://github.com/llvm/llvm-project/pull/107970
Align BAT YAML (DataAggregator) to YAMLProfileWriter which drops blocks
without profile:
https://github.com/llvm/llvm-project/blob/main/bolt/lib/Profile/YAMLProfileWriter.cpp#L162-L176
Test Plan: NFCI
llvmbot wrote:
@llvm/pr-subscribers-bolt
Author: Amir Ayupov (aaupov)
Changes
Align BAT YAML (DataAggregator) to YAMLProfileWriter which drops blocks
without profile:
https://github.com/llvm/llvm-project/blob/main/bolt/lib/Profile/YAMLProfileWriter.cpp#L162-L176
Test Plan: NFCI
---
Full
https://github.com/aaupov updated
https://github.com/llvm/llvm-project/pull/107137
>From 50c021b09950cf7d6a8f25b1ac0dec246f2325f5 Mon Sep 17 00:00:00 2001
From: Amir Ayupov
Date: Tue, 3 Sep 2024 11:38:04 -0700
Subject: [PATCH] update pseudoprobe-decoding-inline.test
Created using spr 1.3.4
---
https://github.com/aaupov updated
https://github.com/llvm/llvm-project/pull/107137
>From 50c021b09950cf7d6a8f25b1ac0dec246f2325f5 Mon Sep 17 00:00:00 2001
From: Amir Ayupov
Date: Tue, 3 Sep 2024 11:38:04 -0700
Subject: [PATCH] update pseudoprobe-decoding-inline.test
Created using spr 1.3.4
---
1 - 100 of 144 matches
Mail list logo