https://github.com/tru updated https://github.com/llvm/llvm-project/pull/102466
>From f6381989f454d3f819847272b0d3bd84d6785aef Mon Sep 17 00:00:00 2001
From: Xing Xue
Date: Thu, 8 Aug 2024 09:15:51 -0400
Subject: [PATCH] [NFC][libc++][test][AIX] UnXFAIL LIT test transform.pass.cpp
(#102338)
Re
Author: Xing Xue
Date: 2024-08-12T10:39:47+02:00
New Revision: f6381989f454d3f819847272b0d3bd84d6785aef
URL:
https://github.com/llvm/llvm-project/commit/f6381989f454d3f819847272b0d3bd84d6785aef
DIFF:
https://github.com/llvm/llvm-project/commit/f6381989f454d3f819847272b0d3bd84d6785aef.diff
LOG:
https://github.com/tru closed https://github.com/llvm/llvm-project/pull/102466
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https://github.com/tru updated https://github.com/llvm/llvm-project/pull/102771
>From 4fd6b324ea2d44418832e7f90b2e5ffc1972c900 Mon Sep 17 00:00:00 2001
From: Rainer Orth
Date: Sat, 10 Aug 2024 22:54:07 +0200
Subject: [PATCH] [llvm-exegesis][unittests] Also disable SubprocessMemoryTest
on SPARC
Author: Rainer Orth
Date: 2024-08-12T10:40:07+02:00
New Revision: 4fd6b324ea2d44418832e7f90b2e5ffc1972c900
URL:
https://github.com/llvm/llvm-project/commit/4fd6b324ea2d44418832e7f90b2e5ffc1972c900
DIFF:
https://github.com/llvm/llvm-project/commit/4fd6b324ea2d44418832e7f90b2e5ffc1972c900.diff
L
https://github.com/tru closed https://github.com/llvm/llvm-project/pull/102771
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github-actions[bot] wrote:
@xingxue-ibm (or anyone else). If you would like to add a note about this fix
in the release notes (completely optional). Please reply to this comment with a
one or two sentence description of the fix. When you are done, please add the
release:note label to this PR.
github-actions[bot] wrote:
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release notes (completely optional). Please reply to this comment with a one or
two sentence description of the fix. When you are done, please add the
release:note label to this PR.
htt
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/102865
This will allow them to be shared between the old PM and new PM files.
I don't really like needing to expose these globally like this; maybe
it would be better to just move TargetPassConfig and the CodeGenPassBui
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/102865?utm_source=stack-comment-downstack-mergeability-warning";
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
This will allow them to be shared between the old PM and new PM files.
I don't really like needing to expose these globally like this; maybe
it would be better t
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/102865
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https://github.com/llvm/llvm-project/pull/101698
error: too big or took too long to generate
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https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/101699
>From 66a2fe24e7ee4754d720cd7b12060bf44f981e38 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 26 Jun 2024 14:13:31 +0200
Subject: [PATCH] AMDGPU: Stop handling legacy amdgpu-unsafe-fp-atomics
attribute
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/102867
AMDGPUAnnotateKernelFeatures hasn't been ported yet, but it
should be soon removable.
>From 4dc191a92ac747288627bc86f0a36bea22430e07 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 12 Aug 2024 13:09:55
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/102867
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arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/102867?utm_source=stack-comment-downstack-mergeability-warning";
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Matt Arsenault (arsenm)
Changes
AMDGPUAnnotateKernelFeatures hasn't been ported yet, but it
should be soon removable.
---
Full diff: https://github.com/llvm/llvm-project/pull/102867.diff
2 Files Affected:
- (modified) llvm/lib
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
AMDGPUAnnotateKernelFeatures hasn't been ported yet, but it
should be soon removable.
---
Full diff: https://github.com/llvm/llvm-project/pull/102867.diff
2 Files Affected:
- (modified) llvm/lib/
https://github.com/Pierre-vh approved this pull request.
Add [NFC] tag?
https://github.com/llvm/llvm-project/pull/102806
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@@ -28,8 +36,51 @@ AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
}
void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
- // TODO: Add passes pre instruction selection.
- // Test only, convert to real IR passes in future.
+ const bool LateCFGStructuri
@@ -28,8 +36,51 @@ AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
}
void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
- // TODO: Add passes pre instruction selection.
- // Test only, convert to real IR passes in future.
+ const bool LateCFGStructuri
@@ -28,8 +36,51 @@ AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
}
void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
- // TODO: Add passes pre instruction selection.
- // Test only, convert to real IR passes in future.
+ const bool LateCFGStructuri
https://github.com/llvmbot updated
https://github.com/llvm/llvm-project/pull/101888
>From d757d1e9485b19ac756863ad2a1f58a25720967c Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Sun, 4 Aug 2024 13:27:12 +0100
Subject: [PATCH 1/3] [libunwind] Add GCS support for AArch64 (#99335)
AArch64 GCS (G
john-brawn-arm wrote:
I've added the commits that fix this on Android, and fix a problem with
combining GCS and BTI.
https://github.com/llvm/llvm-project/pull/101888
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arsenm wrote:
### Merge activity
* **Aug 12, 6:58 AM EDT**: @arsenm started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/102806).
https://github.com/llvm/llvm-project/pull/102806
arsenm wrote:
### Merge activity
* **Aug 12, 6:58 AM EDT**: @arsenm started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/102812).
https://github.com/llvm/llvm-project/pull/102812
https://github.com/kaiyan96 created
https://github.com/llvm/llvm-project/pull/102881
We have following bugfixes for window scheduler, do we need submit them by
ourselves?
* [Added a new restriction for II by pragma in window
scheduler](https://github.com/llvm/llvm-project/pull/99448)
* [Fixed
llvmbot wrote:
@llvm/pr-subscribers-backend-hexagon
Author: Kai Yan (kaiyan96)
Changes
We have following bugfixes for window scheduler, do we need submit them by
ourselves?
* [Added a new restriction for II by pragma in window
scheduler](https://github.com/llvm/llvm-project/pull/99448)
*
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102815
>From 355428bc4060b424e0645c2747c7a19513a4edc7 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Sun, 11 Aug 2024 18:11:04 +0400
Subject: [PATCH] CodeGen/NewPM: Add ExpandLarge* passes to isel IR passes
---
l
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102816
>From c5f7f3c67470c604f3d474d4dfa932a3c5efb4f5 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Sun, 11 Aug 2024 18:20:23 +0400
Subject: [PATCH] AMDGPU/NewPM: Start implementing addCodeGenPrepare
---
llvm/li
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102865
>From 64679cbc78a5bba63bf0b5eb5427ffae7aae6b22 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 12 Aug 2024 12:46:00 +0400
Subject: [PATCH] AMDGPU: Declare pass control flags in header
This will allow th
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102867
>From a0b9380496e1c5e42c4c8601a663faee7d3dd365 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 12 Aug 2024 13:09:55 +0400
Subject: [PATCH] AMDGPU/NewPM: Fill out passes in addCodeGenPrepare
AMDGPUAnnota
AaronBallman wrote:
> The patch here is pretty big in size, but it seems to only affects the
> remarks, on the other hand it doesn't seem to really fix anything and in that
> case I feel like RC3 might be the wrong time to merge this. Is there a huge
> upside to take this this late in the proc
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102815
>From 97c4b4cd982579447f51ce8a47cce6b690870f82 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Sun, 11 Aug 2024 18:11:04 +0400
Subject: [PATCH] CodeGen/NewPM: Add ExpandLarge* passes to isel IR passes
---
l
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102816
>From 673d0b7253b82d3a38b66e87831c14885110cc5c Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Sun, 11 Aug 2024 18:20:23 +0400
Subject: [PATCH] AMDGPU/NewPM: Start implementing addCodeGenPrepare
---
llvm/li
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102865
>From c5882b7e0b8bc85390cb82495821965013494d12 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 12 Aug 2024 12:46:00 +0400
Subject: [PATCH] AMDGPU: Declare pass control flags in header
This will allow th
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102867
>From 9aff06fda45db9ddcdb8879a6886552c50613930 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 12 Aug 2024 13:09:55 +0400
Subject: [PATCH] AMDGPU/NewPM: Fill out passes in addCodeGenPrepare
AMDGPUAnnota
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/102884
This is not complete, but gets AtomicExpand running. I was able
to get further than I expected; we're quite close to having all
the IR codegen passes ported.
>From 185d4210d77de0c1db775b4914d3b2e1077dea68 Mon Sep
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/102884
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arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/102884?utm_source=stack-comment-downstack-mergeability-warning";
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Matt Arsenault (arsenm)
Changes
This is not complete, but gets AtomicExpand running. I was able
to get further than I expected; we're quite close to having all
the IR codegen passes ported.
---
Full diff: https://github.com/llvm/
https://github.com/skatrak edited
https://github.com/llvm/llvm-project/pull/102341
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https://github.com/skatrak approved this pull request.
Thank you again Akash, this LGTM. I have a couple of minor nits left, but
there's no need for another review by me after addressing them. Can you add to
ops.mlir an instance of `distribute parallel do/for simd` after line 117?
https://gith
@@ -2383,3 +2383,165 @@ func.func @masked_arg_count_mismatch(%arg0: i32, %arg1:
i32) {
}) : (i32, i32) -> ()
return
}
+
+// -
+func.func @omp_parallel_missing_composite(%lb: index, %ub: index, %step:
index) -> () {
+ omp.distribute {
+ // expected-error@+1 {{'omp.
@@ -1748,11 +1754,27 @@ LogicalResult WsloopOp::verify() {
if (!isWrapper())
return emitOpError() << "must be a loop wrapper";
+ auto wrapper =
+ llvm::dyn_cast_if_present((*this)->getParentOp());
+ bool isCompositeWrapper = wrapper && wrapper.isWrapper() &&
+
@@ -1748,11 +1754,27 @@ LogicalResult WsloopOp::verify() {
if (!isWrapper())
return emitOpError() << "must be a loop wrapper";
+ auto wrapper =
+ llvm::dyn_cast_if_present((*this)->getParentOp());
+ bool isCompositeWrapper = wrapper && wrapper.isWrapper() &&
-
@@ -210,7 +210,7 @@ func.func @invalid_nested_wrapper(%lb : index, %ub : index,
%step : index) {
omp.terminator
}
skatrak wrote:
Nit: Add attribute to `omp.distribute` too.
https://github.com/llvm/llvm-project/pull/102341
___
@@ -36,9 +36,9 @@ func.func @invalid_nested_wrapper(%lb : index, %ub : index,
%step : index) {
omp.terminator
}
skatrak wrote:
Nit: I suppose it doesn't matter because the parent op's verifier fails before
checking this one, but I think it makes
@@ -2173,7 +2173,7 @@ func.func @omp_distribute_nested_wrapper(%lb: index, %ub:
index, %step: index) -
"omp.terminator"() : () -> ()
}) : () -> ()
skatrak wrote:
Nit: Add attribute to `omp.wsloop` too.
https://github.com/llvm/llvm-project/pull/10234
@@ -1965,7 +1965,7 @@ func.func @taskloop(%lb: i32, %ub: i32, %step: i32) {
omp.terminator
}
skatrak wrote:
Nit: Add attribute to `omp.distribute` too.
https://github.com/llvm/llvm-project/pull/102341
___
l
@@ -1064,16 +1064,15 @@ static void printMapClause(OpAsmPrinter &p, Operation
*op,
}
static ParseResult parseMembersIndex(OpAsmParser &parser,
- DenseIntElementsAttr &membersIdx) {
- SmallVector values;
+
https://github.com/skatrak edited
https://github.com/llvm/llvm-project/pull/96265
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@@ -2541,6 +2541,31 @@ static void processMapMembersWithParent(
assert(memberDataIdx >= 0 && "could not find mapped member of structure");
+// If we're currently mapping a pointer to a block of data, we must
+// initially map the pointer, and then attatch/bind the
https://github.com/skatrak approved this pull request.
Thank you Andrew for working on my previous comments. I have a couple of
suggestions to hopefully help simplify things a bit further, but it LGTM. No
need to wait for another look by me before merging.
https://github.com/llvm/llvm-project/
@@ -2261,47 +2261,47 @@ static int getMapDataMemberIdx(MapInfoData &mapData,
static mlir::omp::MapInfoOp
getFirstOrLastMappedMemberPtr(mlir::omp::MapInfoOp mapInfo, bool first) {
- mlir::DenseIntElementsAttr indexAttr = mapInfo.getMembersIndexAttr();
-
+ mlir::ArrayAttr inde
@@ -2541,6 +2541,31 @@ static void processMapMembersWithParent(
assert(memberDataIdx >= 0 && "could not find mapped member of structure");
+// If we're currently mapping a pointer to a block of data, we must
+// initially map the pointer, and then attatch/bind the
@@ -1087,50 +1086,31 @@ static ParseResult parseMembersIndex(OpAsmParser
&parser,
if (failed(parser.parseRSquare()))
return failure();
-// Only set once, if any indices are not the same size
-// we error out in the next check as that's unsupported
-if (s
paperchalice wrote:
+1 for this if backend developers want to test something, although I'm still
trying to improve the pass builder in #89708 after investigating asm printer
and register allocator.
https://github.com/llvm/llvm-project/pull/102884
___
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/102895
Backport 57cd100
Requested by: @labath
>From 5cb7662e5e808dd733e623294c4376f57611723b Mon Sep 17 00:00:00 2001
From: Pavel Labath
Date: Thu, 8 Aug 2024 10:53:15 +0200
Subject: [PATCH] [lldb] Fix crash when add
https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/102895
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llvmbot wrote:
@Michael137 What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/102895
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llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: None (llvmbot)
Changes
Backport 57cd100
Requested by: @labath
---
Full diff: https://github.com/llvm/llvm-project/pull/102895.diff
2 Files Affected:
- (modified) lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
(+9-2)
- (a
https://github.com/Michael137 approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/102895
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arsenm wrote:
> +1 for this if backend developers want to test something, although I'm still
> trying to improve the pass builder in #89708 after investigating asm printer
> and register allocator.
I'm currently blocked by assorted -enable-new-pm tests failing in future
patches because of mis
https://github.com/aaupov edited
https://github.com/llvm/llvm-project/pull/102789
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https://github.com/aaupov updated
https://github.com/llvm/llvm-project/pull/102789
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https://github.com/aaupov updated
https://github.com/llvm/llvm-project/pull/102789
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https://github.com/aaupov created
https://github.com/llvm/llvm-project/pull/102904
Replace the map from addresses to list of probes with a flat vector
containing probe references sorted by their addresses.
Reduces pseudo probe parsing time from 9.56s to 8.59s and peak RSS from
9.66 GiB to 9.08
llvmbot wrote:
@llvm/pr-subscribers-bolt
@llvm/pr-subscribers-pgo
Author: Amir Ayupov (aaupov)
Changes
Replace the map from addresses to list of probes with a flat vector
containing probe references sorted by their addresses.
Reduces pseudo probe parsing time from 9.56s to 8.59s and peak
https://github.com/aaupov created
https://github.com/llvm/llvm-project/pull/102905
Replace unordered_map with a vector. Pre-parse the section to statically
allocate storage. Use BumpPtrAllocator for FuncName strings, keep
StringRef in FuncDesc.
Reduces peak RSS of pseudo probe parsing from 9.08
llvmbot wrote:
@llvm/pr-subscribers-mc
@llvm/pr-subscribers-bolt
Author: Amir Ayupov (aaupov)
Changes
Replace unordered_map with a vector. Pre-parse the section to statically
allocate storage. Use BumpPtrAllocator for FuncName strings, keep
StringRef in FuncDesc.
Reduces peak RSS of pseud
https://github.com/TIFitis updated
https://github.com/llvm/llvm-project/pull/102341
>From ba8cf358a98cfcce6b1239ac88391bc25bcc7197 Mon Sep 17 00:00:00 2001
From: Akash Banerjee
Date: Wed, 7 Aug 2024 18:31:08 +0100
Subject: [PATCH 1/3] [OpenMP][MLIR] Set omp.composite attr for composite loop
wr
@@ -344,6 +345,7 @@ inline void createHLFIRToFIRPassPipeline(
pm.addPass(hlfir::createLowerHLFIRIntrinsics());
pm.addPass(hlfir::createBufferizeHLFIR());
pm.addPass(hlfir::createConvertHLFIRtoFIR());
+ pm.addPass(flangomp::createLowerWorkshare());
agozil
https://github.com/skatrak edited
https://github.com/llvm/llvm-project/pull/96266
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@@ -267,6 +267,24 @@ mlir::Block *fir::FirOpBuilder::getAllocaBlock() {
return getEntryBlock();
}
+static mlir::ArrayAttr makeI64ArrayAttr(llvm::ArrayRef values,
+mlir::MLIRContext *context) {
+ llvm::SmallVector attrs;
+ for (auto &
@@ -175,99 +271,63 @@ getComponentObject(std::optional object,
return getComponentObject(baseObj.value(), semaCtx);
}
-static void
-generateMemberPlacementIndices(const Object &object,
- llvm::SmallVectorImpl &indices,
-
@@ -267,6 +267,24 @@ mlir::Block *fir::FirOpBuilder::getAllocaBlock() {
return getEntryBlock();
}
+static mlir::ArrayAttr makeI64ArrayAttr(llvm::ArrayRef values,
+mlir::MLIRContext *context) {
+ llvm::SmallVector attrs;
--
@@ -175,99 +271,63 @@ getComponentObject(std::optional object,
return getComponentObject(baseObj.value(), semaCtx);
}
-static void
-generateMemberPlacementIndices(const Object &object,
- llvm::SmallVectorImpl &indices,
-
@@ -280,75 +340,60 @@ void insertChildMapInfoIntoParent(
// precedes the children. An alternative, may be to do
// delayed generation of map info operations from the clauses and
// organize them first before generation.
- mapOp->moveAfter(indices.second.b
@@ -85,67 +138,187 @@ class OMPMapInfoFinalizationPass
descriptor = alloca;
}
+return descriptor;
+ }
+
+ /// Simple function that will generate a FIR operation accessing
+ /// the descriptors base address (BoxOffsetOp) and then generate a
+ /// MapInfoOp for
@@ -267,6 +267,24 @@ mlir::Block *fir::FirOpBuilder::getAllocaBlock() {
return getEntryBlock();
}
+static mlir::ArrayAttr makeI64ArrayAttr(llvm::ArrayRef values,
+mlir::MLIRContext *context) {
+ llvm::SmallVector attrs;
+ for (auto &
@@ -85,67 +138,187 @@ class OMPMapInfoFinalizationPass
descriptor = alloca;
}
+return descriptor;
+ }
+
+ /// Simple function that will generate a FIR operation accessing
+ /// the descriptors base address (BoxOffsetOp) and then generate a
+ /// MapInfoOp for
@@ -85,67 +138,187 @@ class OMPMapInfoFinalizationPass
descriptor = alloca;
}
+return descriptor;
+ }
+
+ /// Simple function that will generate a FIR operation accessing
+ /// the descriptors base address (BoxOffsetOp) and then generate a
+ /// MapInfoOp for
@@ -237,26 +436,34 @@ class OMPMapInfoFinalizationPass
getOperation()->walk([&](mlir::omp::MapInfoOp op) {
// TODO: Currently only supports a single user for the MapInfoOp, this
- // is fine for the moment as the Fortran Frontend will generate a
- // new Ma
@@ -85,67 +138,187 @@ class OMPMapInfoFinalizationPass
descriptor = alloca;
}
+return descriptor;
+ }
+
+ /// Simple function that will generate a FIR operation accessing
+ /// the descriptors base address (BoxOffsetOp) and then generate a
+ /// MapInfoOp for
@@ -85,67 +138,187 @@ class OMPMapInfoFinalizationPass
descriptor = alloca;
}
+return descriptor;
+ }
+
+ /// Simple function that will generate a FIR operation accessing
+ /// the descriptors base address (BoxOffsetOp) and then generate a
+ /// MapInfoOp for
@@ -85,67 +138,187 @@ class OMPMapInfoFinalizationPass
descriptor = alloca;
}
+return descriptor;
+ }
+
+ /// Simple function that will generate a FIR operation accessing
+ /// the descriptors base address (BoxOffsetOp) and then generate a
+ /// MapInfoOp for
@@ -216,31 +215,50 @@ bool
ClauseProcessor::processMotionClauses(lower::StatementContext &stmtCtx,
if (origSymbol && fir::isTypeWithDescriptor(origSymbol.getType()))
symAddr = origSymbol;
+ if (object.sym()->owner().IsDerivedType()) {
+
https://github.com/skatrak commented:
Thanks Andrew for the updates to this patch. I gave it a fresh look and I've
got another set of comments, but they should be easy to address.
https://github.com/llvm/llvm-project/pull/96266
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@@ -85,67 +135,227 @@ class OMPMapInfoFinalizationPass
descriptor = alloca;
}
+return descriptor;
+ }
+
+ /// Simple function that will generate a FIR operation accessing
+ /// the descriptors base address (BoxOffsetOp) and then generate a
+ /// MapInfoOp for
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/102924
Backport d469794d0cdfd2fea50a6ce0c0e33abb242d744c
Requested by: @llvmbot
>From d6beb484536981c00754e94c99d666f895b56fcd Mon Sep 17 00:00:00 2001
From: Mariya Podchishchaeva
Date: Mon, 12 Aug 2024 09:08:46 +020
https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/102924
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llvmbot wrote:
@cor3ntin What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/102924
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https://github.com/llvmbot updated
https://github.com/llvm/llvm-project/pull/102924
>From ee828c387981e06204e29effa41032062ddc6cf4 Mon Sep 17 00:00:00 2001
From: Mariya Podchishchaeva
Date: Mon, 12 Aug 2024 09:08:46 +0200
Subject: [PATCH] [clang] Avoid triggering vtable instantiation for C++23
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: None (llvmbot)
Changes
Backport d469794d0cdfd2fea50a6ce0c0e33abb242d744c
Requested by: @llvmbot
---
Full diff: https://github.com/llvm/llvm-project/pull/102924.diff
2 Files Affected:
- (modified) clang/lib/Sema/SemaDeclCXX.cpp (+28-1)
Author: Valentin Clement (バレンタイン クレメン)
Date: 2024-08-12T09:35:08-07:00
New Revision: 94a1b9e30a4f7c96474a3e201dcc0f653046d493
URL:
https://github.com/llvm/llvm-project/commit/94a1b9e30a4f7c96474a3e201dcc0f653046d493
DIFF:
https://github.com/llvm/llvm-project/commit/94a1b9e30a4f7c96474a3e201dcc0
Author: Teresa Johnson
Date: 2024-08-12T09:40:56-07:00
New Revision: a79d1b9501ad436f025e10b390e8858780163ab1
URL:
https://github.com/llvm/llvm-project/commit/a79d1b9501ad436f025e10b390e8858780163ab1
DIFF:
https://github.com/llvm/llvm-project/commit/a79d1b9501ad436f025e10b390e8858780163ab1.diff
https://github.com/coopp approved this pull request.
Looks good.
https://github.com/llvm/llvm-project/pull/100700
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