RFC: [MIPS] Add an option to disable ldc1/sdc1

2013-02-13 Thread Chao-Ying Fu
Hello All, Once in a while we got reports about programs (ex: WebKit, FireFox) crash due to ldc1/sdc1 unaligned accesses on MIPS targets. The root cause is that programmers neglect the alignment issue and cast arbitrary pointers to point to double variables. Although the correct solution i

RE: RFC: [MIPS] Add an option to disable ldc1/sdc1

2013-02-14 Thread Chao-Ying Fu
Richard Sandiford wrote: > Chao-Ying Fu writes: > > Hello All, > > > > Once in a while we got reports about programs (ex: > WebKit, FireFox) > > crash due to ldc1/sdc1 unaligned accesses on MIPS targets. The root > > cause is that programmers neglect the al

RE: RFC: [MIPS] Add an option to disable ldc1/sdc1

2013-02-15 Thread Chao-Ying Fu
Maciej W. Rozycki wrote: > > On Thu, 14 Feb 2013, Richard Sandiford wrote: > > > What about 64-bit targets? We can sometimes access doubles > using GPRs, > > so on 64-bit targets we could end up using LD and SD to > access a double > > even when this option disables LDC1 and SDC1. I think we'

Re: [EXTERNAL][PATCH 0/61] Improve Mips target

2025-02-04 Thread Chao-ying Fu
> This patch series improves the support for the mips64r6 target in GCC, > includes the enhancements to the general bug fixes and contains other > MIPS ISA and processor enablement. > > These patches are cherry-picked from the mips_rel/11_2_0/master > and mips_rel/9_3_0/master branches from the MI