On 4/27/23 04:32, H.J. Lu via Gcc-patches wrote:
> cherry-pick:
Can you please wait a few days before it? I'm going to merge again
in the near future after https://reviews.llvm.org/D144073 got handled.
Martin
>
> 05551c658269 [sanitizer] Correct alignment of x32 __sanitizer_siginfo
>
> *
Hello, gentle maintainer.
This is a message from the Translation Project robot. (If you have
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A new POT file for textual domain 'gcc' has been made available
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On Wed, 26 Apr 2023, Jakub Jelinek wrote:
> Hi!
>
> As has been discussed before, the following patch adds target hook
> for math library function maximum errors measured in ulps.
> The default is to return ~0U which is a magic maximum value which means
> nothing is known about precision of the m
The following addresses IPA param manipulation (through IPA SRA)
replacing
BIT_FIELD_REF <*this_8(D), 8, 56>
with
BIT_FIELD_REF (ISRA.814), 8, 56>
which is supposed to be invalid GIMPLE (ISRA.814 is a register).
There's currently insufficient checking in place to catch this in the
IL verifi
On Wed, Apr 26, 2023 at 6:16 PM Jonathan Wakely via Gcc-patches
wrote:
>
> As suggested here:
> https://gcc.gnu.org/pipermail/gcc/2023-April/241190.html
>
> OK for trunk?
OK
> -- >8 --
>
> gcc/ChangeLog:
>
> * doc/extend.texi (Zero Length): Describe example.
> ---
> gcc/doc/extend.texi
On 26.04.2023 17:45, Palmer Dabbelt wrote:
> On Wed, 26 Apr 2023 08:26:26 PDT (-0700), gcc-patches@gcc.gnu.org wrote:
>>
>>
>> On 4/25/23 08:50, Jan Beulich via Gcc-patches wrote:
>>> RISC-V will emit ".option nopic" when -fno-pie is in effect, which
>>> matches the generic pattern. Just like done
Hello, gentle maintainer.
This is a message from the Translation Project robot.
A revised PO file for textual domain 'gcc' has been submitted
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Hello, gentle maintainer.
This is a message from the Translation Project robot.
A revised PO file for textual domain 'gcc' has been submitted
by the Swedish team of translators. The file is available at:
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On 4/26/23 21:27, Andrew MacLeod wrote:
Sparsely used ssa caches can benefit from using a bitmap to determine if
a name already has an entry. The path_query class was already managing
something like this internally, but there is benefit to making it
generally available.
ssa_lazy_cache inh
We fail to verify the constraints under which we allow handled
components to wrap registers. The gcc.dg/pr70022.c testcase shows
that we happily end up with
_2 = VIEW_CONVERT_EXPR(v_1(D))
as produced by SSA rewrite and update_address_taken. But the intent
was that we wrap registers with at mo
`vr`, `vm` and `vd` constarint for vector register constarint, those 3
constarint has implemented on LLVM as well.
gcc/ChangeLog:
* doc/md.texi (RISC-V): Add vr, vm, vd constarint.
---
gcc/config/riscv/riscv-modes.def| 4
gcc/config/riscv/riscv-protos.h | 2 ++
gcc/config/
On Wed, Apr 26, 2023 at 04:10:32PM +, Michael Matz wrote:
> On Wed, 26 Apr 2023, Jakub Jelinek via Gcc-patches wrote:
>
> > For glibc I've gathered data from:
> > 4) using attached ulp-tester.c (how to invoke in file comment; tested
> >both x86_64, ppc64, ppc64le 50M pseudo-random values i
On Thu, Apr 27, 2023 at 07:18:52AM +, Richard Biener wrote:
> Humm. Is it worth the trouble? I think if we make use of this it needs
I think so. Without that, frange is half blind, using at least most common
libm functions in floating point code is extremely common and without
knowing anyth
On Apr 14, 2023, Alexandre Oliva wrote:
> On Mar 23, 2023, Alexandre Oliva wrote:
>> This patch introduces infrastructure for targets to add an offset to
>> the label issued after the call_insn to set the call_return_pc
>> attribute. This will be used on rs6000, that sometimes issues another
>>
Hi,
On Thu, Apr 27 2023, Richard Biener wrote:
> The following addresses IPA param manipulation (through IPA SRA)
> replacing
>
> BIT_FIELD_REF <*this_8(D), 8, 56>
>
> with
>
> BIT_FIELD_REF (ISRA.814), 8,
> 56>
>
> which is supposed to be invalid GIMPLE (ISRA.814 is a register).
> There's cu
Tested powerpc64le-linux. Pushed to trunk.
-- >8 --
This changes std::random_device constructors to throw std::system_error
(with EINVAL as the error code) when the constructor argument is
invalid. We can also throw std::system_error when read(2) fails so that
the exception includes the additiona
Tested powerpc64le-linux. Docs tested on Fedora 37 with Doxygen 1.9.7
from current git master.
Pushed to trunk. I'll probably backport this too.
-- >8 --
libstdc++-v3/ChangeLog:
PR libstdc++/40380
* include/bits/basic_string.h: Improve doxygen comments.
* include/bits/c
Tested powerpc64le-linux. Docs tested on Fedora 37 with Doxygen 1.9.7
from current git master.
Pushed to trunk. I'll probably backport this too.
-- >8 --
libstdc++-v3/ChangeLog:
* include/bits/memory_resource.h: Improve doxygen comments.
* include/std/memory_resource: Likewise.
Tested powerpc64le-linux. Docs tested on Fedora 37 with Doxygen 1.9.7
from current git master.
Pushed to trunk. I'll backport this too.
-- >8 --
libstdc++-v3/ChangeLog:
* include/bits/mofunc_impl.h: Fix typo in doxygen comment.
* include/std/format: Likewise.
---
libstdc++-v3/
Tested powerpc64le-linux. Docs tested on Fedora 37 with Doxygen 1.9.7
from current git master.
Pushed to trunk. I'll backport this too.
-- >8 --
Including the header source code in the doxygen-generated PDF file makes
it too large, and causes pdflatex to run out of memory. If we only set
SOURCE
Tested powerpc64le-linux. Docs tested on Fedora 37 with Doxygen 1.9.7
from current git master.
Pushed to trunk.
-- >8 --
libstdc++-v3/ChangeLog:
* doc/doxygen/user.cfg.in (FORMULA_TRANSPARENT, DOT_FONTNAME)
(DOT_FONTSIZE, DOT_TRANSPARENT): Remove obsolete options.
---
libstdc++
On Thu, 27 Apr 2023, Jakub Jelinek wrote:
> On Thu, Apr 27, 2023 at 07:18:52AM +, Richard Biener wrote:
> > Humm. Is it worth the trouble? I think if we make use of this it needs
>
> I think so. Without that, frange is half blind, using at least most common
> libm functions in floating poi
On Mon, Apr 24, 2023 at 11:31 PM Andrew Pinski via Gcc-patches
wrote:
>
> While looking into moving optimizations from minmax_replacement
> in phiopt to match.pd, I Noticed that min/max were considered
> trapping even if -ffinite-math-only was being used. This changes
> those expressions to be sim
On Mon, Apr 24, 2023 at 11:31 PM Andrew Pinski via Gcc-patches
wrote:
>
> This simple patch moves the body of store_elim_worker
> direclty into pass_cselim::execute.
>
> Also removes unneeded prototypes too.
>
> OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
OK.
> gcc/Chang
On Mon, Apr 24, 2023 at 11:33 PM Andrew Pinski via Gcc-patches
wrote:
>
> In the early PHIOPT mode, the original minmax_replacement, would
> replace a PHI node with up to 2 min/max expressions in some cases,
> this allows for that too.
>
> OK? Bootstrapped and tested on x86_64-linux-gnu with no re
On Mon, Apr 24, 2023 at 11:31 PM Andrew Pinski via Gcc-patches
wrote:
>
> Since the last cleanups, it made easier to see
> that we should split out the store elimination
> worker from tree_ssa_phiopt_worker function.
>
> OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
OK.
>
On Mon, Apr 24, 2023 at 11:33 PM Andrew Pinski via Gcc-patches
wrote:
>
> This adds a few patterns from phiopt's minmax_replacement
> for (A CMP B) ? MIN/MAX : MIN/MAX .
> It is progress to remove minmax_replacement from phiopt.
> There are still some more cases dealing with constants on the
> ed
On Mon, Apr 24, 2023 at 11:34 PM Andrew Pinski via Gcc-patches
wrote:
>
> Now that store elimination and phiopt does not
> share outer code, we can move tree_ssa_phiopt_worker
> directly into pass_phiopt::execute and remove
> many declarations (prototypes) from the file.
OK.
> gcc/ChangeLog:
>
>
On Tue, Apr 18, 2023 at 2:48 PM Aldy Hernandez wrote:
>
>
>
> On 4/18/23 11:06, Aldy Hernandez wrote:
> > I think it's time for the ranger folk to start owning range streaming
> > instead of passes (IPA, etc) doing their own thing. I have plans for
> > overhauling the IPA code later this cycle to
On Thu, Apr 27, 2023 at 10:59:47AM +0200, Jakub Jelinek via Gcc-patches wrote:
> I guess I'll need to look at the IBM double double sinl/cosl results,
> either it is some bug in my tester or the libm functions are useless.
> But appart from the MODE_COMPOSITE_P cases, I think all the numbers are
>
Hi!
On Thu, Apr 27, 2023 at 10:34:59AM +, Richard Biener wrote:
> OK. As said the patch itself looks good to me, let's go ahead. We
> have plenty of time to backtrack until GCC 14.
Thanks. Unfortunately when I started using it, I've discovered that the
CASE_CFN_xxx_ALL macros don't include
Hi!
On Tue, Apr 18, 2023 at 03:12:50PM +0200, Aldy Hernandez wrote:
> [I don't know why I keep poking at floats. I must really like the pain.
> Jakub, are you OK with this patch for trunk?]
>
> This is the range-op entry for sin/cos. It is meant to serve as an
> example of what we can do for gl
On Wed, Apr 26, 2023 at 9:36 AM liuhongt via Gcc-patches
wrote:
>
> Similar like WIDEN FLOAT_EXPR, when direct_optab is not existed, try
> intermediate integer type whenever gimple ranger can tell it's safe.
>
> .i.e.
> When there's no direct optab for vector long long -> vector float, but
> the v
C2x adds the ability to give an enumeration type a fixed underlying
type, as C++ already has. The -fshort-enums option alters the compiler's
choice of underlying type, but when it's fixed the compiler can't
choose.
Similarly for C++ -fstrict-enums has no effect with a fixed underlying
type, becaus
When for example complex lowering wants to extract the imaginary
part of a complex variable for lowering a complex move we can
end up with it generating __imag > which
is valid GENERIC. It then feeds that to the gimplifier via
force_gimple_operand but that fails to split up this chain
of handled
When we simplify a BIT_FIELD_REF of a CTOR like { _1, _2, _3, _4 }
and attempt to produce (view converted) { _1, _2 } for a selected
subset we fail to realize this cannot be done from match.pd since
we have no way to write the resulting CTOR "operation" and the
built CTOR { _1, _2 } isn't a GIMPLE
Thanks. I will put it aside until I start posting the IPA patches.
Aldy
On Thu, Apr 27, 2023, 13:02 Richard Biener
wrote:
> On Tue, Apr 18, 2023 at 2:48 PM Aldy Hernandez wrote:
> >
> >
> >
> > On 4/18/23 11:06, Aldy Hernandez wrote:
> > > I think it's time for the ranger folk to start owning
On 4/27/23 13:13, Jakub Jelinek wrote:
+unsigned bulps = targetm.libm_function_max_error (m_cfn, TYPE_MODE (type),
+ true);
+if (bulps == ~0U)
+ r.set_varying (type);
+else if (bulps == 0)
+ r.set (type, dconstm1, dcons
The optimization barriers inserted after compares enable GCC to derive
information about the values from e.g. the taken paths, or the absence
of exceptions. Move them before the original compares, so that the
reversed compares test copies of the original operands, without
further optimizations.
On Thu, Apr 27, 2023 at 01:46:19PM +0200, Aldy Hernandez wrote:
> On 4/27/23 13:13, Jakub Jelinek wrote:
>
> > +unsigned bulps = targetm.libm_function_max_error (m_cfn, TYPE_MODE
> > (type),
> > + true);
> > +if (bulps == ~0U)
> > + r.s
There are still shells on some systems that lack the ability to start
scripts when not using the shell name explicitly. Adjust genmultilib
to use ${CONFIG_SHELL-/bin/sh} the same way configure does.
Regstrapped on x86_64-linux-gnu. Also built riscv64-elf on an affected
platform. I'm checking
The old legacy code would allow building ranges containing symbolics,
even though the entire ranger ecosystem does not handle them. These
were normalized into non-zero ranges by helper functions in VRP
(range_fold_*_expr) before calling the ranger. The only users of
these functions should have be
On 4/27/23 13:53, Jakub Jelinek wrote:
On Thu, Apr 27, 2023 at 01:46:19PM +0200, Aldy Hernandez wrote:
On 4/27/23 13:13, Jakub Jelinek wrote:
+unsigned bulps = targetm.libm_function_max_error (m_cfn, TYPE_MODE (type),
+ true);
+if
The following generalizes the range-op for __builtin_expect
by using the fnspec machinery.
We've defered this to stage1 - bootstrapped and tested on
x86_64-unknown-linux-gnu.
OK?
Thanks,
Richard.
PR tree-optimization/109170
* gimple-range-op.cc (gimple_range_op_handler::maybe_b
On Thu, Apr 27, 2023 at 12:10:40PM +, Richard Biener wrote:
> The following generalizes the range-op for __builtin_expect
> by using the fnspec machinery.
>
> We've defered this to stage1 - bootstrapped and tested on
> x86_64-unknown-linux-gnu.
>
> OK?
>
> Thanks,
> Richard.
>
> PR t
On Thu, Apr 27, 2023 at 1:48 PM Alexandre Oliva via Gcc-patches
wrote:
>
>
> The optimization barriers inserted after compares enable GCC to derive
> information about the values from e.g. the taken paths, or the absence
> of exceptions. Move them before the original compares, so that the
> rever
Hi!
The following patch adds sqrt support (but similarly to sincos, only
dumb basic ranges only).
Ok for trunk if it passes bootstrap/regtest?
Will improve this incrementally and sin/cos as well.
2023-04-27 Jakub Jelinek
* gimple-range-op.cc (class cfn_sqrt): New type.
(op_c
Damm, I mixed something up else..
On Thu, Apr 27, 2023 at 4:53 PM Kito Cheng via Gcc-patches
wrote:
>
> `vr`, `vm` and `vd` constarint for vector register constarint, those 3
> constarint has implemented on LLVM as well.
>
> gcc/ChangeLog:
>
> * doc/md.texi (RISC-V): Add vr, vm, vd const
`vr`, `vm` and `vd` constarint for vector register constarint, those 3
constarint has implemented on LLVM as well.
gcc/ChangeLog:
* doc/md.texi (RISC-V): Add vr, vm, vd constarint.
---
V2 changes:
- Drop unrelated changes.
---
gcc/doc/md.texi | 9 +
1 file changed, 9 insertion
Ok
On Thu, Apr 27, 2023, 15:30 Jakub Jelinek wrote:
> Hi!
>
> The following patch adds sqrt support (but similarly to sincos, only
> dumb basic ranges only).
>
> Ok for trunk if it passes bootstrap/regtest?
>
> Will improve this incrementally and sin/cos as well.
>
> 2023-04-27 Jakub Jelinek
Hello, gentle maintainer.
This is a message from the Translation Project robot.
A revised PO file for textual domain 'gcc' has been submitted
by the French team of translators. The file is available at:
https://translationproject.org/latest/gcc/fr.po
(This file, 'gcc-13.1.0.fr.po', has jus
May I please ping this one??
https://gcc.gnu.org/pipermail/gcc-patches/2023-February/612152.html
Many Thanks!
Victor
On 2/16/23 15:48, Victor L. Do Nascimento wrote:
> Hi all,
>
> The back-end pattern for mapping the auto-vectorized representation of
> vector * scalar to to machine instruction
clmul[h] instructions were added only for the ZBKC extension.
This patch includes them in the ZBC extension too.
Besides, added support of 'clmulr' instructions for ZBC extension.
gcc/ChangeLog:
* config/riscv/bitmanip.md: Added clmulr instruction.
* config/riscv/riscv-builtins.cc (AVAI
From: Pan Li
When some RVV integer compare operators act on the same vector
registers without mask. They can be simplified to VMCLR.
This PATCH allow the ne, lt, ltu, gt, gtu to perform such kind
of the simplification by adding one new define_split.
Given we have:
vbool1_t test_shortcut_for_ris
Hello,
On Thu, 27 Apr 2023, Jakub Jelinek wrote:
> The first really large error I see is for sinl with
> x/2gx &val
> 0x748160ed90d9425b0xefd8b811d6293294
> i.e.
> 1.5926552660973502228303666578452949e+253
> with most significant double being
> 1.5926552660973502e+253
> and low double
> -5.99
Hi,
I'm at Ventana now. Change my email address accordingly. Also, add
myself to the DCO list.
Regards
Robin
--
ChangeLog:
* MAINTAINERS: Change my email address.
---
MAINTAINERS | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index
> +(define_split
> + [(set (match_operand: 0 "register_operand")
> + (if_then_else:
> + (unspec:
> + [(match_operand: 1 "vector_all_trues_mask_operand")
> +(match_operand 6 "vector_length_operand")
> +(match_operand 7 "const_int_operand")
>
> Could you try something like this? that should be more generic:
>
> (define_split
> [(set (match_operand:VB 0 "register_operand")
>(if_then_else:VB
> (unspec:VB
>[(match_operand:VB 1 "vector_all_trues_mask_operand")
> (match_operand 4 "vector_length_opera
This patch updates include/ctf.h to match the current libctf version in
binutils' include/. I recently attempted to build a uber tree (following
some notes that are so old they used CVS) and noticed that binutils won't
build with GCC's top-level include, due to CTF_F_IDXSORTED not being
defined i
Thanks, pushed :)
On Thu, Apr 27, 2023 at 11:32 AM Pan Li via Gcc-patches
wrote:
>
> From: Pan Li
>
> The read-thread-pointer test may require the gcc configured
> with --enable-tls. If no, there x4 (aka tp) register will not
> be presented in the assembly code.
>
> This patch requires the tls f
Ooops, I found that it also warns on intrinsic functions, could you
try to find some way to exclude that?
e.g.
#include "riscv_vector.h"
void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out,
size_t n, int cond) {
size_t vl;
if (cond)
vl = __riscv_vsetvlmax_e32m1();
else
vl =
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
In testcases like this one, the printing of candidates in a diagnostic has
been longer than necessary because it jumps back and forth between the call
site and the candidate site. So here, we first say at the call site that no
match was fou
On Thu, Apr 27, 2023 at 12:16:34PM +0100, Jonathan Wakely via Gcc-patches wrote:
> C2x adds the ability to give an enumeration type a fixed underlying
> type, as C++ already has. The -fshort-enums option alters the compiler's
> choice of underlying type, but when it's fixed the compiler can't
> cho
On Wed, 26 Apr 2023 17:04:17 PDT (-0700), colli...@rivosinc.com wrote:
Hi Robin and Juzhe,
Just took a look and I like the approach.
I assume it's best to just squash these into the series? That seems
reasonable to me, the only issue is that Micheal's PTO for a few days
(this week and the f
This patch implements noncontiguous "target update" for Fortran, on top
of the following in-review patch series:
https://gcc.gnu.org/pipermail/gcc-patches/2022-December/609031.html
(with followup:
https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609566.html)
and:
https://gcc.gnu.org
Remove references to MEMMODEL_SYNC_* models by converting via
memmodel_base().
2023-04-27 Patrick O'Neill
gcc/ChangeLog:
* config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
sanitize memmodel input with memmodel_base.
Signed-off-by: Patrick O'Neill
---
gcc/config/riscv/r
This change makes atomic stores strictly stronger than table A.6 of the
ISA manual. This mapping makes the overall patchset compatible with
table A.7 as well.
2023-04-27 Patrick O'Neill
PR 89835
gcc/ChangeLog:
* config/riscv/sync.md:
gcc/testsuite/ChangeLog:
* gcc.tar
This patch enforces SEQ_CST for atomic compare_exchange ops.
Replace Fence/LR.aq/SC.aq pairs with SEQ_CST LR.aqrl/SC.rl pairs
recommended by table A.6 of the ISA manual.
2023-04-27 Patrick O'Neill
gcc/ChangeLog:
* config/riscv/sync.md: Change FENCE/LR.aq/SC.aq into
sequentially
This patchset aims to make the RISCV atomics implementation stronger
than the recommended mapping present in table A.6 of the ISA manual.
https://github.com/riscv/riscv-isa-manual/blob/c7cf84547b3aefacab5463add1734c1602b67a49/src/memory.tex#L1083-L1157
Context
-
GCC defined RISC-V mappin
This change brings atomic loads in line with table A.6 of the ISA
manual.
2023-04-27 Patrick O'Neill
gcc/ChangeLog:
* config/riscv/sync.md (atomic_load): Implement atomic
load mapping.
Signed-off-by: Patrick O'Neill
---
gcc/config/riscv/sync.md | 28 ++
Atomic operations with the appropriate bits set already enfore release
semantics. Remove unnecessary release fences from atomic ops.
This change brings AMO ops in line with table A.6 of the ISA manual.
2023-04-27 Patrick O'Neill
gcc/ChangeLog:
* config/riscv/riscv.cc
(riscv_mem
Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs
recommended by table A.6 of the ISA manual.
2023-04-27 Patrick O'Neill
libgcc/ChangeLog:
* config/riscv/atomic.c: Change LR.aq/SC.rl pairs into
sequentially consistent LR.aqrl/SC.rl pairs.
Signed-off-by: Patrick O'N
Introduce the %I and %J flags for setting the .aqrl bits on LR/SC pairs
as needed.
Atomic compare and exchange ops provide success and failure memory
models. C++17 and later place no restrictions on the relative strength
of each model, so ensure we cover both by using a model that enforces
the ord
These tests cover basic cases to ensure the atomic mappings follow the
strengthened Table A.6 mappings that are compatible with Table A.7.
2023-04-27 Patrick O'Neill
gcc/testsuite/ChangeLog:
* gcc.target/riscv/amo-table-a-6-amo-add-1.c: New test.
* gcc.target/riscv/amo-table-a-6
Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs
recommended by table A.6 of the ISA manual.
2023-04-27 Patrick O'Neill
gcc/ChangeLog:
* config/riscv/sync.md: Change LR.aq/SC.rl pairs into
sequentially consistent LR.aqrl/SC.rl pairs.
Signed-off-by: Patrick O'Neill
This change brings atomic fences in line with table A.6 of the ISA
manual.
Relax mem_thread_fence according to the memmodel given.
2023-04-27 Patrick O'Neill
gcc/ChangeLog:
* config/riscv/sync.md (mem_thread_fence_1): Change fence
depending on the given memory model.
Signed-of
This patch sets the relevant .rl bits on amo operations.
2023-04-27 Patrick O'Neill
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_print_operand): change behavior
of %A to include release bits.
Signed-off-by: Patrick O'Neill
---
gcc/config/riscv/riscv.cc | 7 ++-
1 file ch
On Thu, Apr 27, 2023 at 12:03 AM Martin Liška wrote:
>
> On 4/27/23 04:32, H.J. Lu via Gcc-patches wrote:
> > cherry-pick:
>
> Can you please wait a few days before it? I'm going to merge again
> in the near future after https://reviews.llvm.org/D144073 got handled.
Sure.
> Martin
>
> >
> > 0555
I've committed this patch to fix a couple of bugs introduced in the
recent CMul patch.
First, the fmsubadd insn was accidentally all adds and no substracts.
Second, there were input dependencies on the undefined output register
which caused the compiler to reserve unnecessary slots in the stac
The testcase from this PR fails to link when -fchecking=2 with the error:
/usr/bin/ld: /tmp/ccpHiXEY.o: in function `bar::bar()':
...: undefined reference to `foo::foo()'
ultimately because we end up instantiating the NSDMI for bar::alloc_
from the template context func1 for which in_template
On Thu, Apr 27, 2023 at 09:22:50AM -0700, Patrick O'Neill wrote:
> This patchset aims to make the RISCV atomics implementation stronger
> than the recommended mapping present in table A.6 of the ISA manual.
> https://github.com/riscv/riscv-isa-manual/blob/c7cf84547b3aefacab5463add1734c1602b67a49/sr
Hello, gentle maintainer.
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This patch fixes several cases where multiple attach or detach mapping
nodes were being created for stand-alone attach or detach clauses
in Fortran. After the introduction of stricter checking later during
compilation, these extra nodes could cause ICEs, as seen in the PR.
The patch also fixes ca
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Now that with r14-11-g2245459c85a3f4 made us coerce the template
arguments of a bound ttp again after level-lowering, this unfortunately
causes a crash from coerce_template_args_for_ttp in the below testcase.
During the level-lowering substitution T=int into the bound ttp TT
as part of substitutio
On Thu, Apr 27, 2023 at 4:46 PM Patrick Palka wrote:
>
> Now that with r14-11-g2245459c85a3f4 made us coerce the template
> arguments of a bound ttp again after level-lowering, this unfortunately
> causes a crash from coerce_template_args_for_ttp in the below testcase.
>
> During the level-lowerin
On 4/25/23 11:00, Jan Beulich wrote:
When IPv6 is disabled in the kernel, the error message coming back from
Cody::OpenInet6() is different from the sole so far expected one.
ok -- i couldn't find such a system :)
---
v2: Re-base.
--- a/gcc/testsuite/g++.dg/modules/bad-mapper-3.C
+++ b/gcc/te
On 4/25/23 11:04, Jan Beulich wrote:
On 28.06.2022 16:06, Jan Beulich wrote:
The pathname underneath gcm.cache/ is determined from the effective name
used for the main input file of a particular module. When modules are
built, no canonicalization occurs for the main input file. Hence the
module
Tested x86_64-linux.
Pushed to gcc-12 and gcc-11 (not needed on gcc-13 or trunk).
-- >8 --
libstdc++-v3/ChangeLog:
* include/std/atomic: Add missing @endcond doxygen comment.
---
libstdc++-v3/include/std/atomic | 1 +
1 file changed, 1 insertion(+)
diff --git a/libstdc++-v3/include/st
FWIW, we'd love to be able to backport this to GCC 13 (maybe 12, but no
big deal there) in Gentoo so we can continue doing large testing builds with
a lot of checking enabled, given this affects Chromium.
But it's no big deal if it's too invasive.
signature.asc
Description: PGP signature
When using -mcmodel=medium, large data is placed into .l* sections. GNU ld
places .l* sections into separate output sections. If small and medium
code model object files are mixed, the .l* sections won't cause
relocation overflow pressure on sections in -mcmodel=small object files.
However, when
Thanks Kito for the better approach. It works well with the prepared test cases
but I may have one question about the semantics of the vector_move_operand.
The defined predicate of vector_move_operand composes of (non-imm || (const
vector && (reload_completed ? constraint_vi (op) : constraint_wc
Two issues have been observed in current riscv_expand_conditional_move
implementation.
1. Before introduction of TARGET_XTHEADCONDMOV, op0 of comparision expression
is used for mode comparision with word_mode, but after TARGET_XTHEADCONDMOV
megered with TARGET_SFB_ALU, dest of if-then-else is used
From: Pan Li
When some RVV integer compare operators act on the same vector
registers without mask. They can be simplified to VMCLR.
This PATCH allow the ne, lt, ltu, gt, gtu to perform such kind
of the simplification by adding one new define_split.
Given we have:
vbool1_t test_shortcut_for_ris
This factors out some of the code from the min/max detection
from match.pd into a function so it can be reused in other
places. This is mainly used to detect the conversions
of >= to > which causes the integer values to be changed by
one.
Changes since v1:
* factor out the checks for INTEGER_CSTs
This patch converts two_value_replacement function
into a match.pd pattern.
It is a direct translation with only one minor change,
does not check for the {0,+-1} case as that is handled
before in match.pd so there is no reason to do the extra
check for it.
OK? Bootstrapped and tested on x86_64-lin
From: Christoph Müllner
This series improves the support for the XThead* ISA extensions
which are available e.g. on the T-Head XuanTie C906.
The ISA spec can be found here:
https://github.com/T-head-Semi/thead-extension-spec
So far the following extension support has been merged in GCC:
* XTh
From: Christoph Müllner
The current support of the bitfield-extraction instructions
th.ext and th.extu (XTheadBb extension) only covers sign_extract
and zero_extract. This patch add support for sign_extend and
zero_extend to avoid any shifts for sign or zero extensions.
gcc/ChangeLog:
*
From: Christoph Müllner
We have the following situation for MEM RTX objects:
* TARGET_PRINT_OPERAND expands to riscv_print_operand()
* This falls into the default case (unknown or on letter) of the outer
switch-case-block and the MEM case of the inner switch-case-block and
calls output_addres
From: Christoph Müllner
A recent change adjusted the constraints of ZBA's shNadd INSN.
Let's mirror this change here as well.
gcc/ChangeLog:
* config/riscv/thead.md: Adjust constraints of th_addsl.
Signed-off-by: Christoph Müllner
---
gcc/config/riscv/thead.md | 5 ++---
1 file chang
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