Re: [PATCH] Suppress ssp.c unused variable warning on mingw

2017-04-01 Thread Jakub Jelinek
On Sat, Apr 01, 2017 at 03:35:35AM +, JonY wrote: > This suppresses an unused variable warning for mingw*, patch OK? Ok. > Index: libssp/ssp.c > === > --- libssp/ssp.c (revision 246630) > +++ libssp/ssp.c (working copy)

[PATCH] On x86 allow if-conversion of more than one insn as long as there is at most one cmov (PR tree-optimization/79390)

2017-04-01 Thread Jakub Jelinek
Hi! As discussed in the PR, in the following testcase we don't if-convert with the generic (and many other) tuning, because we default to --param max-rtl-if-conversion-insns=1 in most of the tunings. The problem we have is with multiple cmov instructions, but in the testcase there is just one cmov

[PATCH] Bump the default thread stack size on Darwin in libgomp (PR libgomp/79876)

2017-04-01 Thread Jakub Jelinek
Hi! Apparently Darwin has insane default stack size for pthread_create unless overridden through pthread_attr_setstacksize - 512kB, compared e.g. to Linux usual default of around 8MB. For typical OpenMP uses that is way too low, so the following patch is an attempt to bump it to 2MB just on Darwi

[PATCH] Avoid emitting "sizetype" type names into .debug_info (PR debug/80263)

2017-04-01 Thread Jakub Jelinek
Hi! This PR is about debug info containing the artificial "sizetype" type as name of a DW_TAG_base_type, which can clash with user sizetype identifiers etc. Apparently we already have code that attempts to not expose that type, but only do that if sizetype has TYPE_DECL as TYPE_NAME and that deno

Re: [patch, fortran] PR38573 Missing markers for translation

2017-04-01 Thread Thomas Koenig
Hi Jerry, Minor patch to had translation marks. Regression tested. OK for Trunk? OK. I would think that adding _(...) to a string needing translations is both obvious and simple; I think we can pre-approve such patches. Regards Thomas

Re: [patch, fortran] PR38573 Missing markers for translation

2017-04-01 Thread Jakub Jelinek
On Sat, Apr 01, 2017 at 03:28:31PM +0200, Thomas Koenig wrote: > Hi Jerry, > > > Minor patch to had translation marks. > > > > Regression tested. OK for Trunk? > > OK. > > I would think that adding _(...) to a string needing > translations is both obvious and simple; I think we can > pre-approv

New Spanish PO file for 'gcc' (version 7.1-b20170226)

2017-04-01 Thread Translation Project Robot
Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Spanish team of translators. The file is available at: http://translationproject.org/latest/gcc/es.po (This file, 'gcc-7.1-b20170226.es.po',

New French PO file for 'gcc' (version 7.1-b20170226)

2017-04-01 Thread Translation Project Robot
Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the French team of translators. The file is available at: http://translationproject.org/latest/gcc/fr.po (This file, 'gcc-7.1-b20170226.fr.po', h

[PATCH 0/9] New back end ia16: 16-bit Intel x86

2017-04-01 Thread Andrew Jenner
About 10 years ago, Rask Ingemann Lambertsen sent a patch series to add a 16-bit x86 (i.e. 8088, 8086, 80186 and 80286 CPUs) back end. This work was never committed. Recently I've been doing some work on this back end, and today we released a Sourcery CodeBench Lite distribution based on it (se

[PATCH 1/9] New target 16-bit Intel x86

2017-04-01 Thread Andrew Jenner
To config-patc...@gnu.org: You'll receive only this part of the patch set. 2017-04-01 Andrew Jenner Rask Ingemann Lambertsen * config.sub: Add support for 16-bit Intel x86. Index: config.sub === --- config.sub

[PATCH 2/9] Libgcc bits and the back end itself

2017-04-01 Thread Andrew Jenner
This part is the back end itself. libgcc/ 2017-04-01 Andrew Jenner Rask Ingemann Lambertsen * config.host: Add support for ia16. * ia16/t-ia16: New. gcc/ 2017-04-01 Andrew Jenner Rask Ingemann Lambertsen * config.gcc: Add support for ia16.

[PATCH 3/9] Documentation for the ia16 back end

2017-04-01 Thread Andrew Jenner
This patch updates the documentation. 2017-04-01 Andrew Jenner Rask Ingemann Lambertsen * doc/md.texi: Update for new ia16 back end. * doc/invoke.texi: Likewise. * doc/contrib.texi: Likewise. * doc/install.texi: Likewise. Index: gcc/doc/invoke.texi

[PATCH 6/9] ia16 testsuite changes

2017-04-01 Thread Andrew Jenner
2017-04-01 Andrew Jenner Rask Ingemann Lambertsen * g++.old-deja/g++.warn/flow1.C: Add support for ia16. * g++.old-deja/g++.robertl/eb76.C: Likewise. * g++.old-deja/g++.brendan/enum11.C: Likewise. * g++.old-deja/g++.jason/thunk3.C: Likewise. * g+

[PATCH 4/9] libstdc++ changes for ia16

2017-04-01 Thread Andrew Jenner
2017-04-01 Andrew Jenner * src/c++11/cow-stdexcept.cc (_ITM_RU2): Declare. (txnal_read_ptr): Allow 16-bit pointers. * src/c++11/codecvt.cc (read_utf8_code_point): Handle 16-bit int. Index: libstdc++-v3/src/c++11/cow-stdexcept.cc ===

[PATCH 5/9] libstdc++ testsuite changes

2017-04-01 Thread Andrew Jenner
2017-04-01 Andrew Jenner * testsuite/25_algorithms/copy/streambuf_iterators/wchar_t/4.cc: Add support for ia16. * testsuite/25_algorithms/random_shuffle/moveable.cc: Likewise. * testsuite/25_algorithms/nth_element/58800.cc: Likewise. * testsuite/18_support/numeric_li

[PATCH 7/9] ira-color

2017-04-01 Thread Andrew Jenner
In the course of working with ia16, I found a case where the sorted_allocnos array in ira-color.c requires more than ira_allocnos_num entries. The following patch allows this array to expand when this happens. 2017-04-01 Andrew Jenner * ira-color.c (n_sorted_allocnos): New variable.

[PATCH 8/9] subreg_get_info

2017-04-01 Thread Andrew Jenner
In the course of working with the ia16 port, I found a case of subreg shape (I think it was a 32-bit value in one 16-bit register and two 8-bit registers) which is not currently supported by subreg_get_info but which easily could be, with the attached change. 2017-04-01 Andrew Jenner

[PATCH 9/9] c-family/c-cppbuiltin.c fix

2017-04-01 Thread Andrew Jenner
I needed to apply the attached patch for ia16, so that __LIBGCC_JCR_SECTION_NAME__ does not get defined unless TARGET_USE_JCR_SECTION is. 2017-04-01 Andrew Jenner * c-family/g-cppbuiltin.c (c_cpp_builtins): guard __LIBGCC_JCR_SECTION_NAME__ definition with TARGET_USE_JCR_SECTION. Index

Re: [PATCH 9/9] c-family/c-cppbuiltin.c fix

2017-04-01 Thread Andrew Pinski
On Sat, Apr 1, 2017 at 9:54 AM, Andrew Jenner wrote: > I needed to apply the attached patch for ia16, so that > __LIBGCC_JCR_SECTION_NAME__ does not get defined unless > TARGET_USE_JCR_SECTION is. > > 2017-04-01 Andrew Jenner > > * c-family/g-cppbuiltin.c (c_cpp_builtins): guard > __LIBGCC_

Re: [PATCH, rs6000] Document location of ELF V2 ABI specification

2017-04-01 Thread Gerald Pfeifer
On Fri, 31 Mar 2017, Bill Schmidt wrote: > OK, I've committed this as r246617. Gerald, please let me know > if you'd like any changes to the text. This looks fine to me. Just "These are described briefly below." I'd written as "These are briefly described below." to avoid "briefly" seen as ref

Re: [patch, fortran] PR38573 Missing markers for translation

2017-04-01 Thread Jerry DeLisle
On 04/01/2017 06:40 AM, Jakub Jelinek wrote: --- snip --- > > So, the above means the strings are translated twice (say if in theory > you translate from english to language X and that translation, when > used as english, translated again to language X means something different, > you get wrong me

Re: [PATCH 7/9] ira-color

2017-04-01 Thread Gerald Pfeifer
On Sat, 1 Apr 2017, Andrew Jenner wrote: In the course of working with ia16, I found a case where the sorted_allocnos array in ira-color.c requires more than ira_allocnos_num entries. The following patch allows this array to expand when this happens. 2017-04-01 Andrew Jenner * ira-co

Re: [PATCH] On x86 allow if-conversion of more than one insn as long as there is at most one cmov (PR tree-optimization/79390)

2017-04-01 Thread Segher Boessenkool
Hi, On Sat, Apr 01, 2017 at 02:20:27PM +0200, Jakub Jelinek wrote: > As discussed in the PR, in the following testcase we don't if-convert > with the generic (and many other) tuning, because we default to > --param max-rtl-if-conversion-insns=1 in most of the tunings. > The problem we have is with

Re: [PATCH] On x86 allow if-conversion of more than one insn as long as there is at most one cmov (PR tree-optimization/79390)

2017-04-01 Thread Jakub Jelinek
On Sat, Apr 01, 2017 at 01:43:36PM -0500, Segher Boessenkool wrote: > Hi, > > On Sat, Apr 01, 2017 at 02:20:27PM +0200, Jakub Jelinek wrote: > > As discussed in the PR, in the following testcase we don't if-convert > > with the generic (and many other) tuning, because we default to > > --param max

[wwwdocs] readings.html -- tweak www.polyhedron.com reference

2017-04-01 Thread Gerald Pfeifer
...to use https. Applied. Gerald Index: readings.html === RCS file: /cvs/gcc/wwwdocs/htdocs/readings.html,v retrieving revision 1.274 diff -u -r1.274 readings.html --- readings.html 25 Mar 2017 08:55:40 - 1.274 +++ re

[wwwdocs,C++] wg21.link's on projects/cxx-status.html

2017-04-01 Thread Gerald Pfeifer
Hi Jason, is there a particular reason you used uppercase for this one link, unlike the others? Not a problem per se, just for the sake of consistency (also to minimize exception rules I maintain for my link checker ;-). Any objections to the patch below? Gerald Index: projects/cxx-status.html

[C++ PATCH] Fix rejects-valid of binding a reference to a static member fn (PR c++/80176)

2017-04-01 Thread Jakub Jelinek
Hi! Apparently when initialize_reference -> reference_binding -> lvalue* is called with a static data member function with object. in front of it, it still sees a COMPONENT_REF with BASELINK as second argument and its BASELINK_FUNCTIONS either a FUNCTION_DECL or OVERLOAD. Only later on when actua

Re: [PATCH 1/9] New target 16-bit Intel x86

2017-04-01 Thread Ben Elliston
On Sat, Apr 01, 2017 at 05:47:46PM +0100, Andrew Jenner wrote: > 2017-04-01 Andrew Jenner > Rask Ingemann Lambertsen > > * config.sub: Add support for 16-bit Intel x86. Applied, thanks. Ben signature.asc Description: Digital signature

[v3 PATCH] Implement std::is_aggregate.

2017-04-01 Thread Ville Voutilainen
Tested on Linux-x64. 2017-04-02 Ville Voutilainen Implement std::is_aggregate. * include/std/type_traits (is_aggregate): New. * testsuite/20_util/is_aggregate/requirements/explicit_instantiation.cc: New. * testsuite/20_util/is_aggregate/requirements/typedefs.cc: Likewise.

Re: [PATCH 2/9] Libgcc bits and the back end itself

2017-04-01 Thread Segher Boessenkool
Hi! Looks pretty good. Some of it shows its age. Indents are weird in many places (tabs that should be two spaces; tabs after spaces; eight spaces instead of a tab; continuation lines aligned wrong). A few more specific comments (many of those happen more than once): On Sat, Apr 01, 2017 at 05

Re: [PATCH 2/8] [i386] Add option -moutline-msabi-xlogues

2017-04-01 Thread Daniel Santos
Uros, can I please get your opinion on this? I have no objections to this, but I want to check with you first. On 02/10/2017 10:54 AM, Sandra Loosemore wrote: I'd like to re-iterate my previous request that the option be renamed -mno-inline-msabi-xlogues. No other option that controls inlinin

Re: [RFC] [PATCH] [i386] Test program for ms_abi to sysv_abi function calls

2017-04-01 Thread Daniel Santos
I've had to make changes to the test program, as I was using XSI extensions which aren't implemented on Cygwin. But before I post the new patch, I noticed that it may be in the wrong directory. There is a gcc/testsuite/gcc.target/x86_64/abi directory and even a callabi subdirectory of that. F

Re: [DOC PATCH] PowerPC extended asm example

2017-04-01 Thread Sandra Loosemore
On 03/31/2017 07:30 AM, Alan Modra wrote: Some people over at OpenBLAS were asking me whether I knew of a whitepaper on gcc asm. I didn't besides the gcc manual, and wrote a note explaining some tricks. This patch is that note cleaned up. Tested by an x86_64-linux build. OK to apply? The pat

[v3 PATCH] PR libstdc++/79141

2017-04-01 Thread Ville Voutilainen
Tested on Linux-x64. 2017-04-02 Ville Voutilainen PR libstdc++/79141 * include/bits/stl_pair.h (__wrap_nonesuch): New. (operator=(typename conditional< __and_, is_copy_assignable<_T2>>::value, const pair&, const __wrap_nonesuch&>::type)): Change __nonesuch to __wrap

Re: [v3 PATCH] Implement std::is_aggregate.

2017-04-01 Thread Jakub Jelinek
On Sun, Apr 02, 2017 at 01:18:58AM +0300, Ville Voutilainen wrote: > Tested on Linux-x64. > > 2017-04-02 Ville Voutilainen > > Implement std::is_aggregate. > * include/std/type_traits (is_aggregate): New. > * testsuite/20_util/is_aggregate/requirements/explicit_instantiation.cc: >