On Wed, Feb 26, 2014 at 10:13 PM, Tobias Grosser wrote:
> On 02/26/2014 10:09 PM, Mircea Namolaru wrote:
>>
>> This patch fixes the libgomp problems:
>> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58028
>>
>> 2014-02-26 Tobias Grosser
>> Mircea Namolaru
>>
>> Fix for bug 58028
>> * graphite-clas
On Wed, Feb 26, 2014 at 11:19 PM, Tobias Burnus wrote:
> Dear all,
>
> as suggested by Richard, it now only prints the namelist name and no longer
> the variables of the namelist.
>
> Bootstrapped on x86-64-gnu-linux and currently regtesting.
> OK for the trunk when it succeeds?
Works for me, but
On Thu, Feb 27, 2014 at 6:28 AM, Alexandre Oliva wrote:
> Some ports were failing an assertion check that was supposed to make
> sure some RTX created a new VALUE, rather than reuse an existing one in
> the cselib tables. The reason the value was already there was that we'd
> recorded the registe
On Thu, Feb 27, 2014 at 6:54 AM, Alexandre Oliva wrote:
> We indirectly call remove_useless_values quite often during
> vt_initialize; at least once per extended basic block. On functions
> with thousands of small basic blocks, each adding permanent and
> temporary entries to the table, that turn
Hi!
On Wed, 26 Feb 2014 19:32:35 +0400, Ilmir Usmanov wrote:
> This patch is pretty obvious. Currently ASYNC clause cannot have
> integer-expression-list. Patch fixes this.
>
> OK for gomp4 branch?
> From df76a29ebf869687209d7a606e243624cc136dbc Mon Sep 17 00:00:00 2001
> From: Ilmir Usmanov
On 26/02/14 14:48, Kyrill Tkachov wrote:
Hi all,
The generic rtx cost table was written with AArch32 cores in mind. It would be a
better idea to use the Cortex-A57 costs for the generic CPU in aarch64. That way
we schedule for the Cortex-A53 and do instruction selection for the Cortex-A57.
Sinc
Hi Richard, hi all,
I wrote:
> @@ -1713,21 +1733,24 @@ dump_generic_node (pretty_printer *buffer, tree node,
> int spc, int flags,
> case BIND_EXPR:
...
> for (op0 = BIND_EXPR_VARS (node); op0; op0 = DECL_CHAIN (op0))
> {
>-print_declaration (buffer,
Ping!
On 02/20/2014 12:11 PM, Dimitris Papavasiliou wrote:
Hello all,
Pinging this patch review request again. See previous messages quoted
below for details.
Regards,
Dimitris
On 02/13/2014 04:22 PM, Dimitris Papavasiliou wrote:
Hello,
Pinging this patch review request. Can someone involve
Hi Tobias and Mircea,
On 02/26/2014 10:09 PM, Mircea Namolaru wrote:
> + /* Do not remove scalar dimensions. Cloog be default removes scalar
> + dimensions very early from the input schedule. However, they are
Small nit: Instead of 'be default' it should be 'by default'
Tobias
On Thu, Feb 27, 2014 at 10:37 AM, Tobias Burnus
wrote:
> Hi Richard, hi all,
>
> I wrote:
>> @@ -1713,21 +1733,24 @@ dump_generic_node (pretty_printer *buffer, tree
>> node, int spc, int flags,
>> case BIND_EXPR:
> ...
>> for (op0 = BIND_EXPR_VARS (node); op0; op0 = DECL_CHAIN (op
Hi Thomas!
Fixed patch and ChangeLog in attachment.
On 27.02.2014 12:59, Thomas Schwinge wrote:
GANG/ASYNC/WAIT, for consistency?
Fixed.
For consistency, also move OMP_CLAUSE_ASYNC_EXPR in gcc/tree.h, and also
adapt OMP_CLAUSE_ASYNC in gcc/tree-pretty-print.c:dump_omp_clause?
It is already a
Tobias Burnus writes:
> On 02/26/2014 10:09 PM, Mircea Namolaru wrote:
>> + /* Do not remove scalar dimensions. Cloog be default removes scalar
>> + dimensions very early from the input schedule. However, they are
>
> Small nit: Instead of 'be default' it should be 'by default'
... and two space
Hi Ilmir!
On Thu, 27 Feb 2014 13:55:36 +0400, Ilmir Usmanov wrote:
> Fixed patch and ChangeLog in attachment.
By the way, what I usually do is to put a change's ChangeLog snippet into
that Git commit's commit message, and then once I get to the point where
I push something upstream, I can just t
On Thu, Feb 27, 2014 at 10:43:33AM +0100, Richard Biener wrote:
> > hence, one ends up in the code I quote above. That code calls
> > print_declaration()
...
> > Hence, TREE_TYPE() is void_type_node and dereferencing that one leads to an
> > ICE.
Sorry, I misremembered. In any case, the follow
On Thu, Feb 27, 2014 at 11:39 AM, Tobias Burnus
wrote:
> On Thu, Feb 27, 2014 at 10:43:33AM +0100, Richard Biener wrote:
>
>> > hence, one ends up in the code I quote above. That code calls
>> > print_declaration()
> ...
>> > Hence, TREE_TYPE() is void_type_node and dereferencing that one leads
dpnt .L1
mov r35 = r8
addl r14 = @gprel(.LC1), gp
;;
ld8 r14 = [r14]
;;
ld8 r15 = [r14], 8
;;
mov b6 = r15
ld8 r1 = [r14]
br.call.sptk.many b0 = b6
;;
mov r1 = r34
.L1:
mov ar.pfs = r33
mov b0 = r32
Committed as r208197.
--
Ilmir.
Thanks, this is what I have installed.
Andreas.
* config/m68k/m68k.c (m68k_option_override): Disable
-flive-range-shrinkage for classic m68k.
(m68k_override_options_after_change): Likewise.
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index f20d071..7f7d66
On 21 February 2014 04:24, Kugan wrote:
> Compiling inline asm results in ICE (PR60034). Alignment calculation in
> aarch64_classify_address for (symbol_ref:DI ("*.LANCHOR4") [flags
> 0x182])) seems wrong here.
Hi Kugan,
+ else if (SYMBOL_REF_FLAGS (sym))
+ align = GET_MODE_ALIGNMENT (GET_
Hi,
This is a case where we end up with an ICE in movmisalign where
mode is DImode because the address so generated is aligned to 32 bits as
a result of V_C_E on an _Atomic Complex float temporary to a DImode
temporary. The problem also shows up only when you have -mfpu=neon
turned on becaus
On 24 February 2014 10:01, Ian Bolton wrote:
> Hi,
>
> This is needed for when people are porting their aarch32 code to aarch64.
> They will have #ifdef __ARM_NEON (as specified in ACLE) and their intrinsics
> currently won't get used on aarch64 because it's not defined there by
> default.
>
> Thi
On 24 February 2014 09:49, Renlin Li wrote:
> gcc/testsuite/ChangeLog:
>
> 2014-02-03 Renlin Li
>
> * gcc.target/aarch64/aapcs64/validate_memory.h: Move f32in64 and
> i32in128 cases
> outside special big-endian processing block.
This is is a fix for a broken test case, this is OK.
/M
On 12 February 2014 16:10, Renlin Li wrote:
> gcc/ChangeLog:
>
> 2014-02-12 Renlin Li
>
> * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust the
> output asm format
> by adding a space between base register and offset.
OK for stage-1.
/Marcus
Hi Alan,
My two cents...
> --- a/bfd/elf32-sparc.c
> +++ b/bfd/elf32-sparc.c
> @@ -1,7 +1,5 @@
> /* SPARC-specific support for 32-bit ELF
> - Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
> - 2003, 2004, 2005, 2006, 2007, 2010, 2011
> - Free Software Foundation, Inc
On 24 February 2014 18:17, James Greenhalgh wrote:
> gcc/
>
> 2014-02-24 James Greenhalgh
>
> * config/aarch64/aarch64-simd.md
> (aarch64_cmdi): Always split.
> (*aarch64_cmdi): New.
> (aarch64_cmtstdi): Always split.
> (*aarch64_cmtstdi): New.
OK for s
Hmm, I wonder why we aren't devirtualizing that call on ia64. Does it
work with -O3?
Jason
Jason Merrill writes:
> Hmm, I wonder why we aren't devirtualizing that call on ia64. Does it
> work with -O3?
That doesn't change anything fundamentally.
Andreas.
--
Andreas Schwab, SUSE Labs, sch...@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now f
Hi
I noticed that for T32 we don't allow any old register for DImode
values. The restriction of an even register is true only for ARM state
because the ISA doesn't allow any old register in this place. In a few
large .i files that I had knocking about, noticed a nice drop in stack
usage and a
On Thu, Feb 27, 2014 at 2:53 PM, Andreas Schwab wrote:
> Jason Merrill writes:
>
>> Hmm, I wonder why we aren't devirtualizing that call on ia64. Does it
>> work with -O3?
>
> That doesn't change anything fundamentally.
I think the vtable lookup sequence is different and nobody cared to adjust
On 02/27/2014 09:03 AM, Richard Biener wrote:
Jason Merrill writes:
Hmm, I wonder why we aren't devirtualizing that call on ia64.
I think the vtable lookup sequence is different and nobody cared to adjust
the gimple matcher to also match the ia64 sequence.
Ah. So xfail on ia64?
Jason
On Thu, Feb 27, 2014 at 3:51 PM, Jason Merrill wrote:
> On 02/27/2014 09:03 AM, Richard Biener wrote:
>>>
>>> Jason Merrill writes:
Hmm, I wonder why we aren't devirtualizing that call on ia64.
>>
>> I think the vtable lookup sequence is different and nobody cared to adjust
>>
>> the gi
Hi,
On 02/26/14 02:25, Andrew Pinski wrote:
Hi,
With ILP32, some simple usage of TLS variables causes an unrecognizable
instruction due to needing to use SImode for loading pointers from memory.
This fixes the three (tlsie_small, tlsle_small, tlsdesc_small) patterns to
support SImode for poin
On 02/26/14 02:25, Andrew Pinski wrote:
Hi,
This is the final patch which adds support for the dynamic linker and
multi-lib directories for ILP32. I did not change multi-arch support as
I did not know what it should be changed to and internally here at Cavium,
we don't use multi-arch. Update
On 02/21/2014 12:14 PM, Paolo Carlini wrote:
Hi,
unless we have reasons to believe that the diagnostic quality could
regress in some circumstances, we can easily resolve this ICE on
invalid regression by always returning error_mark_node after error
(thus outside SFINAE too).
Pinging this pat
[resending as text/plain]
Hi
These patches optimise 64 bit division by removing the use of the
__gnu_[u]ldivmod_helper functions and hence avoiding the redundant
calculation of the remainder in those functions.
Bootstrapped, tested and checked for arm-unknown-linux-gnueabihf.
Benchmarked on Chr
On Thu, Feb 27, 2014 at 04:00:22PM +0100, Richard Biener wrote:
> On Thu, Feb 27, 2014 at 3:51 PM, Jason Merrill wrote:
> > On 02/27/2014 09:03 AM, Richard Biener wrote:
> >>>
> >>> Jason Merrill writes:
>
> Hmm, I wonder why we aren't devirtualizing that call on ia64.
> >>
> >> I think
The code I factored out of expand_or_defer_fn_1 into
tentative_decl_linkage is intended for use with functions that are
defined; using it on functions that have not been defined causes problems.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit 2e63bb7138e59e7e04e2649fb3d8086fffc238a7
Autho
On 26 February 2014 02:25, Andrew Pinski wrote:
> Hi,
> With ILP32, some simple usage of TLS variables causes an unrecognizable
> instruction due to needing to use SImode for loading pointers from memory.
> This fixes the three (tlsie_small, tlsle_small, tlsdesc_small) patterns to
> support SImo
On 26 February 2014 02:25, Andrew Pinski wrote:
>
> Hi,
> Just like most of the targets out there we should define
> TRY_EMPTY_VM_SPACE to have better PCH support.
>
> OK? Built and tested on aarch64-linux-gnu with no regressions.
This is OK for stage-1.
/Marcus
The following patch fixes
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59222
The patch was successfully bootstrapped and tested on x86/x86-64.
Committed as rev. 208201.
2014-02-27 Vladimir Makarov
PR target/59222
* lra.c (lra_emit_add): Check SUBREG too.
Index: lra.c
===
OK.
Jason
On 02/23/2014 02:36 PM, Fabien Chêne wrote:
* cp/method.c (walk_field_subobs): improve the diagnostic
locations for both REFERENCE_TYPEs and non-static const members.
It's important to have the error location be the place where the actual
problem is, namely the constructor defini
On Thu, 27 Feb 2014, Joel Brobecker wrote:
> I should mention, however, that for us to use ranges like this,
> the FSF asked us to add a note explaining that the copyright years
> could be abbreviated into a range. See gdb/README (at the end).
> I suspect that you'll need the same note for binutil
On Tue, Feb 25, 2014 at 06:25:11PM -0800, Andrew Pinski wrote:
> -#elif defined(__aarch64__)
> +#elif defined(__aarch64__) && defined(__LP64__)
> # define TRY_EMPTY_VM_SPACE 0x10
> +#elif defined(__aarch64__)
> +# define TRY_EMPTY_VM_SPACE 0x6000
awesome. thanks andrew!
--kyle
As discussed in 49847, a few years ago GCC was changed to add EH edges
for exceptions that might arise from a floating point comparison. That
change made it possible for a cc0-setter and cc0-user to end up in
different blocks, separated by a NOTE.
After discussing reverting the change, dupl
> On Thu, Feb 27, 2014 at 2:53 PM, Andreas Schwab wrote:
> > Jason Merrill writes:
> >
> >> Hmm, I wonder why we aren't devirtualizing that call on ia64. Does it
> >> work with -O3?
> >
> > That doesn't change anything fundamentally.
>
> I think the vtable lookup sequence is different and nobod
On 02/25/2014 05:03 AM, Paolo Carlini wrote:
here we ICE exactly as we did in c++/53756: the only difference is the
use of decltype(auto) instead of auto. Now, if we compare is_cxx_auto to
is_auto (the front-end helper), evidently there is an inconsistency
about the handling of decltype(auto) and
On 02/17/14 02:28, Eric Botcazou wrote:
Although it's probably time to concede defeat in this particular case, I don't
think we should use the NONJUMP_INSN_P big hammer because we want to eliminate
branches if possible. So I'd just add the minimal test to the two existing
conditions so as to pr
On Thu, Feb 27, 2014 at 11:02 AM, Jeff Law wrote:
>
> As discussed in 49847, a few years ago GCC was changed to add EH edges for
> exceptions that might arise from a floating point comparison. That change
> made it possible for a cc0-setter and cc0-user to end up in different
> blocks, separated
On Thu, Feb 27, 2014 at 11:50 AM, H.J. Lu wrote:
> On Thu, Feb 27, 2014 at 11:02 AM, Jeff Law wrote:
>>
>> As discussed in 49847, a few years ago GCC was changed to add EH edges for
>> exceptions that might arise from a floating point comparison. That change
>> made it possible for a cc0-setter
Hi!
On Wed, 6 Nov 2013 20:53:00 +0100, I wrote:
> gcc/
> * gimplify.c [...]
> (gimplify_oacc_parallel): New function.
To get rid of code duplication, I have applied the following in r208206:
commit 9ffb216dd43bda84f56ce7fe68ae15cc08110924
Author: tschwinge
Date: Thu Feb 27 1
On 02/26/2014 10:09 PM, Alexandre Oliva wrote:
> Regstrapped on x86_64-linux-gnu and i686-linux-gnu, along with the other
> patch for PR debug/59992. Ok to install?
>
>
> for gcc/ChangeLog
>
> PR debug/59992
> * cselib.c (cselib_hasher::equal): Special-case VALUE lookup.
> (c
Hi,
in this regression, we ICE in explain_non_literal_class in:
if (DECL_DELETED_FN (fn))
maybe_explain_implicit_delete (fn);
because fn is a TEMPLATE_DECL. Now, if I read the comment which provides
rationale for LANG_DECL_FN_CHECK:
/* We want to be able to check DECL_C
Thanks for comments - updated the patch (fixed my e-mail address too :-)).
2014-02-26 Tobias Grosser
Mircea Namolaru
Fix for bug 58028
* graphite-clast-to-gimple.c (set_cloog_options):
Don't remove scalar dimensions.
Index: gcc/graphite-clast-to-gimple.c
=
On 02/27/14 12:50, H.J. Lu wrote:
On Thu, Feb 27, 2014 at 11:02 AM, Jeff Law wrote:
As discussed in 49847, a few years ago GCC was changed to add EH edges for
exceptions that might arise from a floating point comparison. That change
made it possible for a cc0-setter and cc0-user to end up in
Hi Mircea,
two last nits:
> 2014-02-26 Tobias Grosser
> Mircea Namolaru
>
> Fix for bug 58028
Please write this as
PR tree-optimization/58028
instead. This way, the commit triggers an update to the bugzilla bug.
> * graphite-clast-to-gimple.c (set_c
On Thu, 2014-02-27 at 17:11 -0500, David Malcolm wrote:
[...]
> With this commit, the API changes to using basic blocks instead: blocks
> are created within functions, and statements are added to blocks, rather
> than to functions.
[...]
I've also ported the "jittest" example to the new API, as
On Mon, Feb 24, 2014 at 9:12 PM, bin.cheng wrote:
> Hi,
> This patch is to fix regression reported in PR60280 by removing forward loop
> headers/latches in cfg cleanup if possible. Several tests are broken by
> this change since cfg cleanup is shared by all optimizers. Some tests has
> already b
On 02/26/14 16:29, David Holsgrove wrote:
Hi Mike S., Michael E.,
-Original Message-
From: Mike Stump [mailto:mikest...@comcast.net]
Sent: Friday, 21 February 2014 6:17 am
To: David Holsgrove
Cc: gcc-patches@gcc.gnu.org; Michael Eager (ea...@eagerm.com); Vidhumouli
Hunsigida; Nagaraju M
On Tue, 25 Feb 2014, bin.cheng wrote:
> Hi,
> This patch is to fix regression reported in PR60280 by removing forward loop
> headers/latches in cfg cleanup if possible. Several tests are broken by
> this change since cfg cleanup is shared by all optimizers. Some tests has
> already been fixed by
Thanks for reporting this, I will look into it.
Thanks,
bin
On Fri, Feb 28, 2014 at 8:52 AM, H.J. Lu wrote:
> On Mon, Feb 24, 2014 at 9:12 PM, bin.cheng wrote:
>> Hi,
>> This patch is to fix regression reported in PR60280 by removing forward loop
>> headers/latches in cfg cleanup if possible.
Sorry, I didn't test it against logical_op_short_circuit target. I
will look into this PR.
Thanks,
bin
On Fri, Feb 28, 2014 at 9:34 AM, Hans-Peter Nilsson wrote:
> On Tue, 25 Feb 2014, bin.cheng wrote:
>
>> Hi,
>> This patch is to fix regression reported in PR60280 by removing forward loop
>> h
Ping. OK for trunk and 4.8?
> -Original Message-
> From: Joey Ye [mailto:joey...@arm.com]
> Sent: 21 February 2014 19:32
> To: gcc-patches@gcc.gnu.org
> Subject: [patch] [arm] Fix PR60169 - thumb1 far jump
>
> Patch http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01229.html introduced
> this
This patch is a mirror copy from approved patch in glibc:
http://sourceware.org/ml/libc-alpha/2014-02/msg00741.html
OK to trunk, 4.8 and 4.7?
ChangeLog.libgcc:
* config/arm/sfp-machine.h (_FP_NANFRAC_H,
_FP_NANFRAC_S, _FP_NANFRAC_D, _FP_NANFRAC_Q):
Set to zero.
diff --git a/libgcc/config/ar
Hi,
I see the problem too.
But I think it is not necessary to change the stack alignment
to solve the problem.
It appears to me that the code in asan_emit_stack_protection
is just wrong. It uses SImode when the memory is not aligned
enough for that mode. This would not happen if that code
is rew
Hi Bernd,
I agree you with the mode problem.
And I have not change the stack alignment.What I change is the virtual
register base's alignment.
Realignment must be make in !STRICT_ALIGNMENT machine,or emitting the
efficient code is impossible.
For example 4 set mem:QI X,REG:QI Y will not combine in
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