Hello all,
I've been looking at a code generation issue with GCC 5.2 lately dealing with
register to register moves through memory with -O3 -funroll-loops. For
reference the C code is at the end of this mail. The generated code for mips is
(cut down for clarity, ldc1 and sdc1 are double word fl
testing.
Thanks,
Simon
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: 31 August 2015 11:40
To: Jeff Law
Cc: Simon Dardis; gcc@gcc.gnu.org
Subject: Re: Predictive commoning leads to register to register moves through
memory.
On Fri, Aug 28, 2015 at 5:48
I took an attempt at addressing this through the RTL GCSE pass. This attempt
tweaks
mem_attrs_eq_p to return true if its comparing something like poly+8 and MEM
[&poly + 8].
Is this a more suitable approach?
Thanks,
Simon
+/* Return true if p and q reference the same location by the same name
cases of base objects and the above
mentioned addr_eq_p. Also in that patch is the change for mem_attrs_eq_p as
in that case the offset is not part of the TREE expression, so it has to be
handled
differently.
Thoughts?
Thanks,
Simon
-Original Message-
From: Richard Biener [mailto:richard.guen