From: Jiajie Chen <[email protected]> In VA32 mode, BL, JIRL and PC* instructions should sign-extend the low 32 bit result to 64 bits.
Signed-off-by: Jiajie Chen <[email protected]> Reviewed-by: Richard Henderson <[email protected]> Signed-off-by: Song Gao <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Message-ID: <[email protected]> --- target/loongarch/translate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c index 9a23ec786d..de7c1c5d1f 100644 --- a/target/loongarch/translate.c +++ b/target/loongarch/translate.c @@ -238,6 +238,9 @@ static TCGv make_address_i(DisasContext *ctx, TCGv base, target_long ofs) static uint64_t make_address_pc(DisasContext *ctx, uint64_t addr) { + if (ctx->va32) { + addr = (int32_t)addr; + } return addr; } -- 2.41.0
