P8 used xscoms for accessing the LPC bus. In P9 the LPC bus was memory mapped, simplifying access, however the xscom registers remained. Some firmwares use this method on P9 and P10, so wire it up in qemu.
The third patch is a hack that shows how to test this access method with skiboot. It should not be applied. Joel Stanley (3): pnv/lpc: Place mmio regs in their own memory region pnv/lpc: Hook up xscom region for P9/P10 HACK: pnv/lpc: Set up XSCOM dt for P9 include/hw/ppc/pnv_lpc.h | 3 ++- include/hw/ppc/pnv_xscom.h | 6 ++++++ hw/ppc/pnv.c | 8 ++++++-- hw/ppc/pnv_lpc.c | 13 ++++++++++++- 4 files changed, 26 insertions(+), 4 deletions(-) -- 2.40.1
