On 8/7/23 08:06, Peter Maydell wrote:
The architecture requires (R_TYTWB) that an attempt to return from EL3
when SCR_EL3.{NSE,NS} are {1,0} is an illegal exception return. (This
enforces that the CPU can't ever be executing below EL3 with the
NSE,NS bits indicating an invalid security state.)

We were missing this check; add it.

Signed-off-by: Peter Maydell<peter.mayd...@linaro.org>
---
  target/arm/tcg/helper-a64.c | 9 +++++++++
  1 file changed, 9 insertions(+)

Reviewed-by: Richard Henderson <richard.hender...@linaro.org>

r~

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