From: Weiwei Li <[email protected]> MMWP and MML bits may affect the allowed privs of PMP entries and the default privs, both of which may change the allowed privs of exsited TLB entries. So we need flush TLB when they are changed.
Signed-off-by: Weiwei Li <[email protected]> Signed-off-by: Junqiang Wang <[email protected]> Reviewed-by: Alistair Francis <[email protected]> Message-Id: <[email protected]> Signed-off-by: Alistair Francis <[email protected]> --- target/riscv/pmp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index 2403039133..4d62dfc732 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -578,6 +578,9 @@ void mseccfg_csr_write(CPURISCVState *env, target_ulong val) if (riscv_cpu_cfg(env)->epmp) { /* Sticky bits */ val |= (env->mseccfg & (MSECCFG_MMWP | MSECCFG_MML)); + if ((val ^ env->mseccfg) & (MSECCFG_MMWP | MSECCFG_MML)) { + tlb_flush(env_cpu(env)); + } } else { val &= ~(MSECCFG_MMWP | MSECCFG_MML | MSECCFG_RLB); } -- 2.40.1
