On 1/6/23 12:19, Peter Maydell wrote:
On Thu, 1 Jun 2023 at 10:48, Philippe Mathieu-Daudé <[email protected]> wrote:
Audit the sysbus_init_irq() calls and manually convert
to sysbus_init_irqs() when a loop is involved.
In omap2_intc_init(), the parent_intr[] array contains
2 elements: use ARRAY_SIZE() to iterate over.
Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
diff --git a/hw/timer/renesas_tmr.c b/hw/timer/renesas_tmr.c
index c15f654738..dd2929d6e7 100644
--- a/hw/timer/renesas_tmr.c
+++ b/hw/timer/renesas_tmr.c
@@ -428,17 +428,14 @@ static void rtmr_init(Object *obj)
{
SysBusDevice *d = SYS_BUS_DEVICE(obj);
RTMRState *tmr = RTMR(obj);
- int i;
memory_region_init_io(&tmr->memory, OBJECT(tmr), &tmr_ops,
tmr, "renesas-tmr", 0x10);
sysbus_init_mmio(d, &tmr->memory);
- for (i = 0; i < ARRAY_SIZE(tmr->ovi); i++) {
- sysbus_init_irq(d, &tmr->cmia[i]);
- sysbus_init_irq(d, &tmr->cmib[i]);
- sysbus_init_irq(d, &tmr->ovi[i]);
- }
+ sysbus_init_irqs(d, tmr->cmia, ARRAY_SIZE(tmr->cmia));
+ sysbus_init_irqs(d, tmr->cmib, ARRAY_SIZE(tmr->cmib));
+ sysbus_init_irqs(d, tmr->ovi, ARRAY_SIZE(tmr->ovi));
Doesn't this change the order of the IRQs? Previously
we had channel 0 CMIA, channel 0 CMIA, channel 0 OVI,
channel 1 CMIA, channel 1 CMIB, channel 1 OVI. Now
we have channel 0 CMIA, channel 1 CMIA, channel 0 CMIB,
channel 1 CMIB, channel 0 OVI, channel 1 OVI. So they'll
get miswired in the board code now...
Oops, good catch. Good case to show the sysbus_init_irq() is
fragile. At least named_gpio are clearer.
I'm surprised because v1 series passed CI, but looking closer
the RX tests isn't run. And now I see commit e5d402b28f
("tests/acceptance: disable machine_rx_gdbsim on GitLab").
"Hopefully we can re-enable both
once the serial timing patches have been added."
Alex, are these patches in the tree now?
