On Wed, Apr 5, 2023 at 6:59 PM Weiwei Li <[email protected]> wrote: > > This patchset tries to simplify the RVH related check and fix some code style > problems, such as problems for indentation, multi-line comments and lines > with over 80 characters. > > The port is available here: > https://github.com/plctlab/plct-qemu/tree/plct-virtfix-upstream > > v2: > * add comment to specify riscv_cpu_set_virt_enabled() can only be called when > RVH is enabled in patch 4 (suggested by Richard Henderson) > * merge patch from LIU Zhiwei(Message-ID: > <[email protected]>) to patch 5 > * use env->virt_enabled directly instead of riscv_cpu_virt_enabled() in patch > 6 (suggested by LIU Zhiwei) > * remain the orginal identation for macro name in patch 8 (suggested by LIU > Zhiwei) > > v3: > * rebase on riscv-to-apply.next (partial patches in v2 have been applied) > * Fix new found format problem in patch 2,3,4 of v3 > > Weiwei Li (4): > target/riscv: Remove riscv_cpu_virt_enabled() > target/riscv: Fix format for indentation > target/riscv: Fix format for comments > target/riscv: Fix lines with over 80 characters
Thanks! Applied to riscv-to-apply.next Alistair > > target/riscv/arch_dump.c | 7 +- > target/riscv/cpu.c | 47 ++-- > target/riscv/cpu.h | 31 +-- > target/riscv/cpu_bits.h | 2 +- > target/riscv/cpu_helper.c | 274 ++++++++++---------- > target/riscv/csr.c | 90 +++---- > target/riscv/debug.c | 21 +- > target/riscv/fpu_helper.c | 24 +- > target/riscv/gdbstub.c | 3 +- > target/riscv/insn_trans/trans_rvv.c.inc | 36 +-- > target/riscv/m128_helper.c | 16 +- > target/riscv/machine.c | 18 +- > target/riscv/op_helper.c | 20 +- > target/riscv/pmp.c | 66 ++--- > target/riscv/pmp.h | 9 +- > target/riscv/pmu.c | 7 +- > target/riscv/sbi_ecall_interface.h | 8 +- > target/riscv/translate.c | 26 +- > target/riscv/vector_helper.c | 317 ++++++++++++++---------- > 19 files changed, 552 insertions(+), 470 deletions(-) > > -- > 2.25.1 > >
