On 12/1/23 15:24, Anton Kochkov wrote:
Fixes: 5a7634a28c ("target-tricore: Add instructions of SLR, SSRO and
SRO opcode format")
Signed-off-by: Eitan Eliahu <[email protected]>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/652
---
target/tricore/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index df9e46c649..b2a5e11778 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -3878,7 +3878,7 @@ static void decode_sro_opc(DisasContext *ctx, int op1)
gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_UB);
break;
case OPC1_16_SRO_LD_H:
- gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address, MO_LESW);
+ gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 2, MO_LESW);
Good catch!
break;
case OPC1_16_SRO_LD_W:
gen_offset_ld(ctx, cpu_gpr_d[15], cpu_gpr_a[r2], address * 4,
MO_LESL);
--
2.39.0
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
