On 12/9/22 07:15, Philippe Mathieu-Daudé wrote:
/* CPU Configuration */
-#if TARGET_BIG_ENDIAN
s->regs[GT_CPU] = 0x00000000;
-#else
- s->regs[GT_CPU] = 0x00001000;
-#endif
+ s->regs[GT_CPU] = FIELD_DP32(s->regs[GT_CPU], GT_CPU, Endianess, cpu_le);
Missing set to zero before deposit.
Though I wonder if
= cpu_le ? R_GT_CPU_Endianness_MASK : 0
might be easier?
-#if TARGET_BIG_ENDIAN
s->regs[GT_PCI0_CMD] = 0x00000000;
-#else
- s->regs[GT_PCI0_CMD] = 0x00010001;
-#endif
+ s->regs[GT_PCI0_CMD] = FIELD_DP32(s->regs[GT_PCI0_CMD],
+ GT_PCI0_CMD, MByteSwap, cpu_le);
+ s->regs[GT_PCI0_CMD] = FIELD_DP32(s->regs[GT_PCI0_CMD],
+ GT_PCI0_CMD, SByteSwap, cpu_le);
This one at least has the zero, but it might as well use the masks like above.
-#if TARGET_BIG_ENDIAN
s->regs[GT_PCI1_CMD] = 0x00000000;
-#else
- s->regs[GT_PCI1_CMD] = 0x00010001;
-#endif
+ s->regs[GT_PCI1_CMD] = FIELD_DP32(s->regs[GT_PCI1_CMD],
+ GT_PCI1_CMD, MByteSwap, cpu_le);
+ s->regs[GT_PCI1_CMD] = FIELD_DP32(s->regs[GT_PCI1_CMD],
+ GT_PCI1_CMD, SByteSwap, cpu_le);
Likewise.
r~
