Implements the Dynamic Execution Control Register (DEXCR) and the
Hypervisor Dynamic Execution Control Register (HDEXCR) in TCG as
defined in Power ISA 3.1B. Only aspects 5 (Non-privileged hash instruction
enable) and 6 (Privileged hash instruction enable) have architectural
effects. Other aspects can be manipulated but have no effect on execution.
Adds checks to these registers in the hashst and hashchk instructions so
that they are executed as nops when not enabled.
Nicholas Miehlbradt (2):
target/ppc: Implement the DEXCR and HDEXCR
target/ppc: Check DEXCR on hash{st, chk} instructions
target/ppc/cpu.h | 19 +++++++++++++
target/ppc/cpu_init.c | 25 +++++++++++++++++
target/ppc/excp_helper.c | 58 +++++++++++++++++++++++++++++-----------
target/ppc/spr_common.h | 1 +
target/ppc/translate.c | 9 +++++++
5 files changed, 97 insertions(+), 15 deletions(-)
--
2.34.1
