On Fri, 10 Jun 2022 at 17:07, Peter Maydell <[email protected]> wrote: > > From: Richard Henderson <[email protected]> > > With ARMv8, this field is always RES0. > With ARMv7, targeting EL2 and TA=0, it is always 0xA.
I was just looking at this change again because we still have the loose end of syn_simd_access_trap() not being used, and I realized that the claim in this commit message and the comment isn't right. The "RES0 or fill in TA/copro fields" test is not v8 vs v7, but "are we reporting this syndrome to AArch64 in ESR_ELx or to AArch32 in HSR?". I filed https://gitlab.com/qemu-project/qemu/-/issues/1153 to make a note of this since we might not get around to fixing this for a while, given it's not very important. thanks -- PMM
