gen_op_mov_v_reg() wants a TCGv, so use cpu_tmp0 like pinsrd does.
Signed-off-by: Andreas Färber <[email protected]>
---
target-i386/translate.c | 17 +++++++++--------
1 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 17465e9..6d09496 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -3916,14 +3916,15 @@ static void gen_sse(DisasContext *s, int b,
target_ulong pc_start, int rex_r)
xmm_regs[reg].XMM_L(val & 3)));
} else { /* pinsrq */
#ifdef TARGET_X86_64
- if (mod == 3)
- gen_op_mov_v_reg(ot, cpu_tmp1_i64, rm);
- else
- tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0,
- (s->mem_index >> 2) - 1);
- tcg_gen_st_i64(cpu_tmp1_i64, cpu_env,
- offsetof(CPUX86State,
- xmm_regs[reg].XMM_Q(val & 1)));
+ if (mod == 3) {
+ gen_op_mov_v_reg(ot, cpu_tmp0, rm);
+ } else {
+ tcg_gen_qemu_ld64_tl(cpu_tmp0, cpu_A0,
+ (s->mem_index >> 2) - 1);
+ }
+ tcg_gen_st_tl(cpu_tmp0, cpu_env,
+ offsetof(CPUX86State,
+ xmm_regs[reg].XMM_Q(val & 1)));
#else
goto illegal_op;
#endif
--
1.7.7
