On 22-05-31 13:39:53, Jonathan Cameron wrote: > Without being able to write these registers, no interleaving is possible. > More refined checks of HDM register state on commit to follow. > > Signed-off-by: Jonathan Cameron <[email protected]> > --- > hw/cxl/cxl-component-utils.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c > index 7985c9bfca..993248b5c0 100644 > --- a/hw/cxl/cxl-component-utils.c > +++ b/hw/cxl/cxl-component-utils.c > @@ -174,6 +174,8 @@ static void hdm_init_common(uint32_t *reg_state, uint32_t > *write_msk) > write_msk[R_CXL_HDM_DECODER0_SIZE_LO + i * 0x20] = 0xf0000000; > write_msk[R_CXL_HDM_DECODER0_SIZE_HI + i * 0x20] = 0xffffffff; > write_msk[R_CXL_HDM_DECODER0_CTRL + i * 0x20] = 0x13ff; > + write_msk[R_CXL_HDM_DECODER0_TARGET_LIST_LO + i * 0x20] = 0xffffffff; > + write_msk[R_CXL_HDM_DECODER0_TARGET_LIST_HI + i * 0x20] = 0xffffffff;
I wonder if this should be 0. It will be weird for endpoints to have a skip value of 0xff. > } > } > > -- > 2.32.0 >
