On 4/5/22 13:04, Stefan Pejic wrote:
From: Dragan Mladjenovic <[email protected]>
If both rs and rt are the same register, the nanoMips instruction
BNEC[32] rs, rt, address is equivalent to NOP (branch is not taken and
there is no delay slot). This commit provides such behavior. Without
this commit, this scenario results in an incorrect behavior.
Signed-off-by: Dragan Mladjenovic <[email protected]>
Signed-off-by: Stefan Pejic <[email protected]>
---
target/mips/tcg/nanomips_translate.c.inc | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
