On 5/3/22 02:14, Stafford Horne wrote:
Yes, we had a mail discussion about this with Peter. This being similar to ARM semihosting; enabling these special instructions should be behind the semihosting flag. Something that needs to be done for this patch.
Ah, ok.
Our other simulators implement this, so the compromise is if we document this officially and only implement it behind semihosting peter was OK with it. I haven't started on the documentation yet as I haven't has much time in the last few days though. Or1ksim: - https://github.com/openrisc/or1ksim/blob/79c6f153390127e50259d46a7cc0421aa787d2ed/cpu/or32/insnset.c#L768 sim: - https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=sim/or1k/or1k.c;h=bfab35461bee1457fe8f42179ac6d27f5ad46b96;hb=HEAD
Thanks for the pointers. r~
