On Thu, Oct 14, 2021 at 10:11 PM Richard Henderson < [email protected]> wrote:
> Split host_signal_pc and host_signal_write out of user-exec.c. > Drop the *BSD code, to be re-created under bsd-user/ later. > > Reviewed-by: Philippe Mathieu-Daudé <[email protected]> > Signed-off-by: Richard Henderson <[email protected]> > --- > linux-user/host/arm/host-signal.h | 30 ++++++++++++++++++++- > accel/tcg/user-exec.c | 45 +------------------------------ > 2 files changed, 30 insertions(+), 45 deletions(-) > Reviewed-by: Warner Losh <[email protected]> > diff --git a/linux-user/host/arm/host-signal.h > b/linux-user/host/arm/host-signal.h > index f4b4d65031..6932224c1c 100644 > --- a/linux-user/host/arm/host-signal.h > +++ b/linux-user/host/arm/host-signal.h > @@ -1 +1,29 @@ > -#define HOST_SIGNAL_PLACEHOLDER > +/* > + * host-signal.h: signal info dependent on the host architecture > + * > + * Copyright (C) 2021 Linaro Limited > + * > + * This work is licensed under the terms of the GNU GPL, version 2 or > later. > + * See the COPYING file in the top-level directory. > + */ > + > +#ifndef ARM_HOST_SIGNAL_H > +#define ARM_HOST_SIGNAL_H > + > +static inline uintptr_t host_signal_pc(ucontext_t *uc) > +{ > + return uc->uc_mcontext.arm_pc; > +} > + > +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) > +{ > + /* > + * In the FSR, bit 11 is WnR, assuming a v6 or > + * later processor. On v5 we will always report > + * this as a read, which will fail later. > + */ > + uint32_t fsr = uc->uc_mcontext.error_code; > + return extract32(fsr, 11, 1); > +} > + > +#endif > diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c > index 17fe867aeb..5656c654e1 100644 > --- a/accel/tcg/user-exec.c > +++ b/accel/tcg/user-exec.c > @@ -255,50 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong > addr, int size, > return size ? g2h(env_cpu(env), addr) : NULL; > } > > -#if defined(__arm__) > - > -#if defined(__NetBSD__) > -#include <ucontext.h> > -#include <sys/siginfo.h> > -#endif > - > -int cpu_signal_handler(int host_signum, void *pinfo, > - void *puc) > -{ > - siginfo_t *info = pinfo; > -#if defined(__NetBSD__) > - ucontext_t *uc = puc; > - siginfo_t *si = pinfo; > -#else > - ucontext_t *uc = puc; > -#endif > - unsigned long pc; > - uint32_t fsr; > - int is_write; > - > -#if defined(__NetBSD__) > - pc = uc->uc_mcontext.__gregs[_REG_R15]; > -#elif defined(__GLIBC__) && (__GLIBC__ < 2 || (__GLIBC__ == 2 && > __GLIBC_MINOR__ <= 3)) > - pc = uc->uc_mcontext.gregs[R15]; > -#else > - pc = uc->uc_mcontext.arm_pc; > -#endif > - > -#ifdef __NetBSD__ > - fsr = si->si_trap; > -#else > - fsr = uc->uc_mcontext.error_code; > -#endif > - /* > - * In the FSR, bit 11 is WnR, assuming a v6 or > - * later processor. On v5 we will always report > - * this as a read, which will fail later. > - */ > - is_write = extract32(fsr, 11, 1); > - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); > -} > - > -#elif defined(__aarch64__) > +#if defined(__aarch64__) > > #if defined(__NetBSD__) > > -- > 2.25.1 > >
