Use the Exception Status Register definitions from "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
target/microblaze/helper.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 20dbd673136..d537f300ca6 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -99,14 +99,22 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
mmu_idx, address);
env->ear = address;
+
+ env->esr = (access_type == MMU_DATA_STORE) ? ESR_S : 0;
switch (lu.err) {
case ERR_PROT:
- env->esr = access_type == MMU_INST_FETCH ? 17 : 16;
- env->esr |= (access_type == MMU_DATA_STORE) << 10;
+ if (access_type == MMU_INST_FETCH) {
+ env->esr |= ESR_EC_INSN_STORAGE;
+ } else {
+ env->esr |= ESR_EC_DATA_STORAGE;
+ }
break;
case ERR_MISS:
- env->esr = access_type == MMU_INST_FETCH ? 19 : 18;
- env->esr |= (access_type == MMU_DATA_STORE) << 10;
+ if (access_type == MMU_INST_FETCH) {
+ env->esr |= ESR_EC_INSN_TLB;
+ } else {
+ env->esr |= ESR_EC_DATA_TLB;
+ }
break;
default:
abort();
--
2.26.3