On 05/18/21 14:43, Xiaojuan Yang wrote:
> From: yangxiaojuan <[email protected]>
>
> fw_cfg_data_read() func supports access widths from
> 1 to 8 bytes while the ops set the wrong read size.
>
> Most arch use 8 bytes to send ram_size to bios.
>
> Signed-off-by: yangxiaojuan <[email protected]>
> ---
> hw/nvram/fw_cfg.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
> index 9b8dcca4ea..242614152c 100644
> --- a/hw/nvram/fw_cfg.c
> +++ b/hw/nvram/fw_cfg.c
> @@ -540,7 +540,7 @@ static const MemoryRegionOps fw_cfg_data_mem_ops = {
> .endianness = DEVICE_BIG_ENDIAN,
> .valid = {
> .min_access_size = 1,
> - .max_access_size = 1,
> + .max_access_size = 8,
> .accepts = fw_cfg_data_mem_valid,
> },
> };
>
This patch conflicts with (adjacent) commits
- cfaadf0e89e7 ("fw_cfg_mem: introduce the "data_width" property",
2014-12-22) and
- 6c87e3d5967a ("fw_cfg_mem: expose the "data_width" property with
fw_cfg_init_mem_wide()", 2014-12-22)
Your board code is supposed to call the fw_cfg_init_mem_wide() function,
for setting the maximum access width.
In fact, I see a call to fw_cfg_init_mem_wide() in
"hw/mips/loongson3_virt.c" already, from commit c76b409fef19 ("hw/mips:
Add Loongson-3 machine support", 2021-01-04). (I'm only highlighting
this board because your email address is from domain "loongson.cn".)
What is the actual problem you're trying to solve?
Thanks
Laszlo
