On Sun, Feb 21, 2021 at 10:31 AM Jim Shu <[email protected]> wrote: > > Like MMU translation, add qemu log of PMP permission checking for > debugging. > > Signed-off-by: Jim Shu <[email protected]>
Reviewed-by: Alistair Francis <[email protected]> Alistair > --- > target/riscv/cpu_helper.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c > index f6ac63bf0e..c1ecb8a710 100644 > --- a/target/riscv/cpu_helper.c > +++ b/target/riscv/cpu_helper.c > @@ -794,6 +794,12 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int > size, > if (ret == TRANSLATE_SUCCESS) { > ret = get_physical_address_pmp(env, &prot_pmp, &tlb_size, pa, > size, access_type, mode); > + > + qemu_log_mask(CPU_LOG_MMU, > + "%s PMP address=" TARGET_FMT_plx " ret %d prot" > + " %d tlb_size " TARGET_FMT_lu "\n", > + __func__, pa, ret, prot_pmp, tlb_size); > + > prot &= prot_pmp; > } > > @@ -821,6 +827,12 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int > size, > if (ret == TRANSLATE_SUCCESS) { > ret = get_physical_address_pmp(env, &prot_pmp, &tlb_size, pa, > size, access_type, mode); > + > + qemu_log_mask(CPU_LOG_MMU, > + "%s PMP address=" TARGET_FMT_plx " ret %d prot" > + " %d tlb_size " TARGET_FMT_lu "\n", > + __func__, pa, ret, prot_pmp, tlb_size); > + > prot &= prot_pmp; > } > } > -- > 2.30.1 > >
