On 2/19/21 6:46 AM, Peter Maydell wrote:
Support SSE variants like the SSE-300 with an ARMSSE_CPU_PWRCTRL register block. Because this block is per-CPU and does not clash with any of the SSE-200 devices, we handle it with a has_cpu_pwrctrl flag like the existing has_cachectrl, has_cpusectrl and has_cpuid, rather than trying to add per-CPU-device support to the devinfo array handling code.Signed-off-by: Peter Maydell<[email protected]> ---
Reviewed-by: Richard Henderson <[email protected]> r~
