Patchew URL: https://patchew.org/QEMU/[email protected]/
Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: [email protected] Subject: [PATCH 00/44] hw/arm: New board model mps3-an547 === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu c79f01c..6de76c5 master -> master - [tag update] patchew/[email protected] -> patchew/[email protected] * [new tag] patchew/[email protected] -> patchew/[email protected] Switched to a new branch 'test' 9f50b75 tests/qtest/sse-timer-test: Add simple tests of the SSE timer and counter 5721ef1 docs/system/arm/mps2.rst: Document the new mps3-an547 board 8f4f44d hw/arm/mps2-tz: Add new mps3-an547 board 56ae353 hw/arm/mps2-tz: Make initsvtor0 setting board-specific cedcec0 hw/arm/mps2-tz: Support running APB peripherals on different clock 8a3cb29 hw/misc/mps2-scc: Implement changes for AN547 d7aba2f hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register 0196623 hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate cb9bc35 hw/arm/mps2-tz: Make UART overflow IRQ board-specific e88392d hw/arm/armsse: Add SSE-300 support 7dfad6e hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block 8743323 hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo 2e453a2 hw/arm/armsse: Add support for SSE variants with a system counter b306dd5 hw/arm/armsse: Indirect irq_is_common[] through ARMSSEInfo d256d57 hw/arm/armsse: Add missing SSE-200 SYS_PPU f9d119e hw/arm/armsse: Move PPUs into data-driven framework 505892c hw/arm/armsse: Move sysctl register block into data-driven framework 71cb081 hw/arm/armsse: Move sysinfo register block into data-driven framework 4d82c84 hw/arm/armsse: Move s32ktimer into data-driven framework 95a46fc hw/arm/armsse: Move watchdogs into data-driven framework caebd17 hw/arm/armsse: Move dual-timer device into data-driven framework 40f2c7d hw/arm/armsse: Add framework for data-driven device placement 2fbd6a8 hw/arm/armsse: Add a define for number of IRQs used by the SSE itself 3ae2516 hw/arm/armsse: Use an array for apb_ppc fields in the state structure dc77980 hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block ffa29a9 hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc c716381 hw/misc/iotkit-sysctl: Implement SSE-200 and SSE-300 PID register values 8ce7637 hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers 9d4b193 hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register 6cec0a9 hw/misc/iotkit-sysctl: Handle INITSVTOR* for SSE-300 2f8e871 hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300 29de343 hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour 8023c4f hw/timer/sse-timer: Model the SSE Subsystem System Timer a94b08a hw/timer/sse-counter: Model the SSE Subsystem System Counter ef374a1 hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR 4577400 hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300 5edfae6 hw/misc/iotkit-sysinfo.c: Implement SSE-300 PID register values 2e20f8d hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values 311ed7f hw/misc/iotkit-sysctl: Remove is_sse200 flag d9ebf7b hw/arm/armsse: Introduce SSE subsystem version property 480ef06 hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks() 66bec50 clock: Add clock_ns_to_ticks() function 463dd4b clock: Add ClockPreUpdate callback event type 8af60a1 clock: Add ClockEvent parameter to callbacks === OUTPUT BEGIN === 1/44 Checking commit 8af60a13fd16 (clock: Add ClockEvent parameter to callbacks) WARNING: line over 80 characters #552: FILE: hw/misc/zynq_slcr.c:580: + QDEV_CLOCK_IN(ZynqSLCRState, ps_clk, zynq_slcr_ps_clk_callback, ClockUpdate), total: 0 errors, 1 warnings, 592 lines checked Patch 1/44 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 2/44 Checking commit 463dd4bcfb89 (clock: Add ClockPreUpdate callback event type) 3/44 Checking commit 66bec50bf71e (clock: Add clock_ns_to_ticks() function) 4/44 Checking commit 480ef0656650 (hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks()) 5/44 Checking commit d9ebf7be3922 (hw/arm/armsse: Introduce SSE subsystem version property) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #130: new file mode 100644 total: 0 errors, 1 warnings, 129 lines checked Patch 5/44 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/44 Checking commit 311ed7f81f89 (hw/misc/iotkit-sysctl: Remove is_sse200 flag) WARNING: line over 80 characters #245: FILE: hw/misc/iotkit-sysctl.c:375: + qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl SYSCLK_DIV unimplemented\n"); WARNING: line over 80 characters #260: FILE: hw/misc/iotkit-sysctl.c:387: + qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl CLOCK_FORCE unimplemented\n"); WARNING: line over 80 characters #391: FILE: hw/misc/iotkit-sysctl.c:489: + qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl NMI_ENABLE unimplemented\n"); total: 0 errors, 3 warnings, 392 lines checked Patch 6/44 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 7/44 Checking commit 2e20f8da2f2c (hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values) 8/44 Checking commit 5edfae6d740b (hw/misc/iotkit-sysinfo.c: Implement SSE-300 PID register values) 9/44 Checking commit 45774005e911 (hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300) 10/44 Checking commit ef374a100126 (hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR) 11/44 Checking commit a94b08ad84ba (hw/timer/sse-counter: Model the SSE Subsystem System Counter) 12/44 Checking commit 8023c4f73f96 (hw/timer/sse-timer: Model the SSE Subsystem System Timer) WARNING: line over 80 characters #525: FILE: hw/timer/sse-timer.c:443: + DEFINE_PROP_LINK("counter", SSETimer, counter, TYPE_SSE_COUNTER, SSECounter *), total: 0 errors, 1 warnings, 561 lines checked Patch 12/44 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 13/44 Checking commit 29de34333dbd (hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour) 14/44 Checking commit 2f8e871626f0 (hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300) WARNING: line over 80 characters #162: FILE: hw/misc/iotkit-sysctl.c:481: + qemu_log_mask(LOG_UNIMP, "IoTKit SysCtl NMI_ENABLE unimplemented\n"); total: 0 errors, 1 warnings, 138 lines checked Patch 14/44 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 15/44 Checking commit 6cec0a9166a9 (hw/misc/iotkit-sysctl: Handle INITSVTOR* for SSE-300) 16/44 Checking commit 9d4b193da770 (hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register) 17/44 Checking commit 8ce7637ee794 (hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers) 18/44 Checking commit c716381e120c (hw/misc/iotkit-sysctl: Implement SSE-200 and SSE-300 PID register values) 19/44 Checking commit ffa29a93bd0a (hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc) 20/44 Checking commit dc77980485cf (hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block) 21/44 Checking commit 3ae2516f1ad2 (hw/arm/armsse: Use an array for apb_ppc fields in the state structure) 22/44 Checking commit 2fbd6a885f8e (hw/arm/armsse: Add a define for number of IRQs used by the SSE itself) 23/44 Checking commit 40f2c7de310c (hw/arm/armsse: Add framework for data-driven device placement) 24/44 Checking commit caebd17875a5 (hw/arm/armsse: Move dual-timer device into data-driven framework) 25/44 Checking commit 95a46fc57c93 (hw/arm/armsse: Move watchdogs into data-driven framework) 26/44 Checking commit 4d82c84b1328 (hw/arm/armsse: Move s32ktimer into data-driven framework) 27/44 Checking commit 71cb0813e119 (hw/arm/armsse: Move sysinfo register block into data-driven framework) 28/44 Checking commit 505892cce1df (hw/arm/armsse: Move sysctl register block into data-driven framework) 29/44 Checking commit f9d119e5c005 (hw/arm/armsse: Move PPUs into data-driven framework) 30/44 Checking commit d256d5716097 (hw/arm/armsse: Add missing SSE-200 SYS_PPU) 31/44 Checking commit b306dd56e51b (hw/arm/armsse: Indirect irq_is_common[] through ARMSSEInfo) 32/44 Checking commit 2e453a2b7b25 (hw/arm/armsse: Add support for SSE variants with a system counter) 33/44 Checking commit 87433233c730 (hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo) 34/44 Checking commit 7dfad6e8b373 (hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block) 35/44 Checking commit e88392d4ecf9 (hw/arm/armsse: Add SSE-300 support) 36/44 Checking commit cb9bc357dbe5 (hw/arm/mps2-tz: Make UART overflow IRQ board-specific) 37/44 Checking commit 0196623c8264 (hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate) 38/44 Checking commit d7aba2ff0c17 (hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register) 39/44 Checking commit 8a3cb29dde24 (hw/misc/mps2-scc: Implement changes for AN547) 40/44 Checking commit cedcec0ea104 (hw/arm/mps2-tz: Support running APB peripherals on different clock) 41/44 Checking commit 56ae353735b9 (hw/arm/mps2-tz: Make initsvtor0 setting board-specific) 42/44 Checking commit 8f4f44decdaa (hw/arm/mps2-tz: Add new mps3-an547 board) WARNING: Block comments use a leading /* on a separate line #143: FILE: hw/arm/mps2-tz.c:953: + { /* port 7 reserved */ }, WARNING: line over 80 characters #150: FILE: hw/arm/mps2-tz.c:960: + { "i2s-audio", make_unimp_dev, &mms->i2s_audio, 0x49301000, 0x1000 }, WARNING: line over 80 characters #152: FILE: hw/arm/mps2-tz.c:962: + { "uart0", make_uart, &mms->uart[0], 0x49303000, 0x1000, { 33, 34, 43 } }, WARNING: line over 80 characters #153: FILE: hw/arm/mps2-tz.c:963: + { "uart1", make_uart, &mms->uart[1], 0x49304000, 0x1000, { 35, 36, 44 } }, WARNING: line over 80 characters #154: FILE: hw/arm/mps2-tz.c:964: + { "uart2", make_uart, &mms->uart[2], 0x49305000, 0x1000, { 37, 38, 45 } }, WARNING: line over 80 characters #155: FILE: hw/arm/mps2-tz.c:965: + { "uart3", make_uart, &mms->uart[3], 0x49306000, 0x1000, { 39, 40, 46 } }, WARNING: line over 80 characters #156: FILE: hw/arm/mps2-tz.c:966: + { "uart4", make_uart, &mms->uart[4], 0x49307000, 0x1000, { 41, 42, 47 } }, ERROR: line over 90 characters #157: FILE: hw/arm/mps2-tz.c:967: + { "uart5", make_uart, &mms->uart[5], 0x49308000, 0x1000, { 125, 126, 127 } }, WARNING: Block comments use a leading /* on a separate line #159: FILE: hw/arm/mps2-tz.c:969: + { /* port 9 reserved */ }, total: 1 errors, 8 warnings, 223 lines checked Patch 42/44 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 43/44 Checking commit 5721ef19d42c (docs/system/arm/mps2.rst: Document the new mps3-an547 board) 44/44 Checking commit 9f50b7570a19 (tests/qtest/sse-timer-test: Add simple tests of the SSE timer and counter) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/[email protected]/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to [email protected]
