This patchseries implements a model of the AN547 FPGA image for the MPS3 board. The main benefit of this new board is that it uses the Cortex-M55 CPU and so it allows running guests which use a v8.1M CPU.
This FPGA image is based on the SSE-300, so most of the series is really implementing the SSE-300 model. The differences between the SSE-200 and SSE-300 are mostly not very exciting, but there's a lot of minor tweaking of things like ID register values. We also need to support the way the SSE-300 has rearranged the address map, so the middle part of the series adds a framework for making the config of the devices behind the PPUs data-driven. The SSE-300 also has new counter and timer devices, so the series includes models of those and tests for them. The interesting feature of these devices is that the SSE system counter device provides a 64-bit count to other timer devices in the system; those timer devices do not run off a direct clock, but only off the count value. (In hardware, there is a 64-bit count value that's connected from the counter to all the timers.) For QEMU I have implemented this by giving the timers a QOM link property so they can be passed the counter device they are connected to, plus some public functions for the counter device for things like "get the count value" and "tell me when the count will hit this value". The SSE-300 also has a system watchdog device which works off the counter in the same way, but in this series I have not modelled the watchdog. The first four patches in the series are the Clock API patches I put out for review earlier. Based-on: [email protected] ("[PATCH v2 00/24] hw/arm: New board model mps3-an524") which added most of the flexibility to the mps2-tz.c code to support these new boards. thanks -- PMM Peter Maydell (44): clock: Add ClockEvent parameter to callbacks clock: Add ClockPreUpdate callback event type clock: Add clock_ns_to_ticks() function hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks() hw/arm/armsse: Introduce SSE subsystem version property hw/misc/iotkit-sysctl: Remove is_sse200 flag hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values hw/misc/iotkit-sysinfo.c: Implement SSE-300 PID register values hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300 hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR hw/timer/sse-counter: Model the SSE Subsystem System Counter hw/timer/sse-timer: Model the SSE Subsystem System Timer hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300 hw/misc/iotkit-sysctl: Handle INITSVTOR* for SSE-300 hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers hw/misc/iotkit-sysctl: Implement SSE-200 and SSE-300 PID register values hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block hw/arm/armsse: Use an array for apb_ppc fields in the state structure hw/arm/armsse: Add a define for number of IRQs used by the SSE itself hw/arm/armsse: Add framework for data-driven device placement hw/arm/armsse: Move dual-timer device into data-driven framework hw/arm/armsse: Move watchdogs into data-driven framework hw/arm/armsse: Move s32ktimer into data-driven framework hw/arm/armsse: Move sysinfo register block into data-driven framework hw/arm/armsse: Move sysctl register block into data-driven framework hw/arm/armsse: Move PPUs into data-driven framework hw/arm/armsse: Add missing SSE-200 SYS_PPU hw/arm/armsse: Indirect irq_is_common[] through ARMSSEInfo hw/arm/armsse: Add support for SSE variants with a system counter hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block hw/arm/armsse: Add SSE-300 support hw/arm/mps2-tz: Make UART overflow IRQ board-specific hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register hw/misc/mps2-scc: Implement changes for AN547 hw/arm/mps2-tz: Support running APB peripherals on different clock hw/arm/mps2-tz: Make initsvtor0 setting board-specific hw/arm/mps2-tz: Add new mps3-an547 board docs/system/arm/mps2.rst: Document the new mps3-an547 board tests/qtest/sse-timer-test: Add simple tests of the SSE timer and counter docs/devel/clocks.rst | 71 +- docs/system/arm/mps2.rst | 6 +- include/hw/arm/armsse-version.h | 42 ++ include/hw/arm/armsse.h | 40 +- include/hw/clock.h | 63 +- include/hw/misc/armsse-cpu-pwrctrl.h | 40 + include/hw/misc/iotkit-secctl.h | 2 + include/hw/misc/iotkit-sysctl.h | 13 +- include/hw/misc/iotkit-sysinfo.h | 2 + include/hw/misc/mps2-fpgaio.h | 2 + include/hw/qdev-clock.h | 17 +- include/hw/timer/sse-counter.h | 105 +++ include/hw/timer/sse-timer.h | 53 ++ hw/adc/npcm7xx_adc.c | 2 +- hw/arm/armsse.c | 1008 +++++++++++++++++++------- hw/arm/mps2-tz.c | 168 ++++- hw/char/cadence_uart.c | 4 +- hw/char/ibex_uart.c | 4 +- hw/char/pl011.c | 5 +- hw/core/clock.c | 24 +- hw/core/qdev-clock.c | 8 +- hw/mips/cps.c | 2 +- hw/misc/armsse-cpu-pwrctrl.c | 149 ++++ hw/misc/bcm2835_cprman.c | 23 +- hw/misc/iotkit-secctl.c | 50 +- hw/misc/iotkit-sysctl.c | 521 ++++++++++--- hw/misc/iotkit-sysinfo.c | 51 +- hw/misc/mps2-fpgaio.c | 52 +- hw/misc/mps2-scc.c | 15 +- hw/misc/npcm7xx_clk.c | 26 +- hw/misc/npcm7xx_pwm.c | 2 +- hw/misc/zynq_slcr.c | 5 +- hw/timer/cmsdk-apb-dualtimer.c | 5 +- hw/timer/cmsdk-apb-timer.c | 4 +- hw/timer/npcm7xx_timer.c | 6 +- hw/timer/sse-counter.c | 474 ++++++++++++ hw/timer/sse-timer.c | 470 ++++++++++++ hw/watchdog/cmsdk-apb-watchdog.c | 5 +- target/mips/cpu.c | 2 +- tests/qtest/sse-timer-test.c | 240 ++++++ MAINTAINERS | 7 + hw/arm/Kconfig | 9 +- hw/misc/Kconfig | 9 + hw/misc/meson.build | 1 + hw/misc/trace-events | 4 + hw/timer/Kconfig | 6 + hw/timer/meson.build | 2 + hw/timer/trace-events | 12 + tests/qtest/meson.build | 1 + 49 files changed, 3356 insertions(+), 476 deletions(-) create mode 100644 include/hw/arm/armsse-version.h create mode 100644 include/hw/misc/armsse-cpu-pwrctrl.h create mode 100644 include/hw/timer/sse-counter.h create mode 100644 include/hw/timer/sse-timer.h create mode 100644 hw/misc/armsse-cpu-pwrctrl.c create mode 100644 hw/timer/sse-counter.c create mode 100644 hw/timer/sse-timer.c create mode 100644 tests/qtest/sse-timer-test.c -- 2.20.1
