On 12/30/20 2:10 PM, Richard Henderson wrote:
> On 12/18/20 6:33 AM, [email protected] wrote:
>> From: Rémi Denis-Courmont <[email protected]>
>>
>> Signed-off-by: Rémi Denis-Courmont <[email protected]>
>> ---
>> target/arm/helper.c | 14 ++++++--------
>> 1 file changed, 6 insertions(+), 8 deletions(-)
>
> The patch does more than what is described above.
>
>>
>> diff --git a/target/arm/helper.c b/target/arm/helper.c
>> index df195c314c..b927e53ab0 100644
>> --- a/target/arm/helper.c
>> +++ b/target/arm/helper.c
>> @@ -10821,17 +10821,12 @@ do_fault:
>> * Returns true if the suggested S2 translation parameters are OK and
>> * false otherwise.
>> */
>> -static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level,
>> +static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, uint32_t level,
>> int inputsize, int stride)
>> {
>> const int grainsize = stride + 3;
>> int startsizecheck;
>>
>> - /* Negative levels are never allowed. */
>> - if (level < 0) {
>> - return false;
>> - }
>> -
>
> I would expect this to be the only hunk from the patch description. Probably
> changing this negative check to a >= 3 check.
Having read the next patch, I think you should drop this type change.
>> @@ -11203,7 +11201,7 @@ static bool get_phys_addr_lpae(CPUARMState *env,
>> uint64_t address,
>>
>> if (!aarch64 || stride == 9) {
>> /* AArch32 or 4KB pages */
>> - startlevel = 2 - sl0;
>> + startlevel = (2 - sl0) & 3;
This hunk belongs with the next patch, implementing TTST, and should be
conditional. I.e.
if (stride == 9) {
startlevel = 2 - sl0;
if (aarch64 &&
cpu_isar_feature(aa64_st, env_archcpu(env)) {
startlevel &= 3;
}
...
r~
