From: Xuzhou Cheng <[email protected]>
When a write to ECSPI_CONREG register to disable the SPI controller,
imx_spi_reset() is called to reset the controller, during which CS
lines should have been disabled, otherwise the state machine of any
devices (e.g.: SPI flashes) connected to the SPI master is stuck to
its last state and responds incorrectly to any follow-up commands.
Fixes: c906a3a01582 ("i.MX: Add the Freescale SPI Controller")
Signed-off-by: Xuzhou Cheng <[email protected]>
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Alistair Francis <[email protected]>
---
Changes in v2:
- Fix the "Fixes" tag in the commit message
hw/ssi/imx_spi.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index e605049a21..85c172e815 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -231,6 +231,7 @@ static void imx_spi_flush_txfifo(IMXSPIState *s)
static void imx_spi_reset(DeviceState *dev)
{
IMXSPIState *s = IMX_SPI(dev);
+ int i;
DPRINTF("\n");
@@ -243,6 +244,10 @@ static void imx_spi_reset(DeviceState *dev)
imx_spi_update_irq(s);
+ for (i = 0; i < ECSPI_NUM_CS; i++) {
+ qemu_set_irq(s->cs_lines[i], 1);
+ }
+
s->burst_length = 0;
}
--
2.25.1
