On Tue, Sep 15, 2020 at 5:47 PM Richard Henderson <[email protected]> wrote: > > Fix alignment of CPURISCVState.vreg. > > Signed-off-by: Richard Henderson <[email protected]>
Reviewed-by: Alistair Francis <[email protected]> Alistair > --- > Cc: Alistair Francis <[email protected]> > Cc: [email protected] > --- > target/riscv/cpu.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 57c006df5d..0bbfd7f457 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -628,6 +628,7 @@ static const TypeInfo riscv_cpu_type_infos[] = { > .name = TYPE_RISCV_CPU, > .parent = TYPE_CPU, > .instance_size = sizeof(RISCVCPU), > + .instance_align = __alignof__(RISCVCPU), > .instance_init = riscv_cpu_init, > .abstract = true, > .class_size = sizeof(RISCVCPUClass), > -- > 2.25.1 > >
