On Thu, Sep 03, 2020 at 12:26:42AM -0700, Richard Henderson wrote: > Introduce typedefs and follow CODING_STYLE for naming. > Rename struct microblaze_mmu to MicroBlazeMMU. > Rename struct microblaze_mmu_lookup to MicroBlazeMMULookup. > > Signed-off-by: Richard Henderson <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]> > --- > target/microblaze/cpu.h | 2 +- > target/microblaze/mmu.h | 15 ++++++--------- > target/microblaze/helper.c | 4 ++-- > target/microblaze/mmu.c | 11 +++++------ > 4 files changed, 14 insertions(+), 18 deletions(-) > > diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h > index 32811f773d..20c2979396 100644 > --- a/target/microblaze/cpu.h > +++ b/target/microblaze/cpu.h > @@ -278,7 +278,7 @@ struct CPUMBState { > > #if !defined(CONFIG_USER_ONLY) > /* Unified MMU. */ > - struct microblaze_mmu mmu; > + MicroBlazeMMU mmu; > #endif > > /* Fields up to this point are cleared by a CPU reset */ > diff --git a/target/microblaze/mmu.h b/target/microblaze/mmu.h > index 75e5301c79..c1feb811b9 100644 > --- a/target/microblaze/mmu.h > +++ b/target/microblaze/mmu.h > @@ -63,8 +63,7 @@ > > #define TLB_ENTRIES 64 > > -struct microblaze_mmu > -{ > +typedef struct { > /* Data and tag brams. */ > uint64_t rams[2][TLB_ENTRIES]; > /* We keep a separate ram for the tids to avoid the 48 bit tag width. */ > @@ -76,10 +75,9 @@ struct microblaze_mmu > int c_mmu_tlb_access; > int c_mmu_zones; > uint64_t c_addr_mask; /* Mask to apply to physical addresses. */ > -}; > +} MicroBlazeMMU; > > -struct microblaze_mmu_lookup > -{ > +typedef struct { > uint32_t paddr; > uint32_t vaddr; > unsigned int size; > @@ -88,13 +86,12 @@ struct microblaze_mmu_lookup > enum { > ERR_PROT, ERR_MISS, ERR_HIT > } err; > -}; > +} MicroBlazeMMULookup; > > -unsigned int mmu_translate(struct microblaze_mmu *mmu, > - struct microblaze_mmu_lookup *lu, > +unsigned int mmu_translate(MicroBlazeMMU *mmu, MicroBlazeMMULookup *lu, > target_ulong vaddr, int rw, int mmu_idx); > uint32_t mmu_read(CPUMBState *env, bool ea, uint32_t rn); > void mmu_write(CPUMBState *env, bool ea, uint32_t rn, uint32_t v); > -void mmu_init(struct microblaze_mmu *mmu); > +void mmu_init(MicroBlazeMMU *mmu); > > #endif > diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c > index 27a24bb99a..3c2fd388fb 100644 > --- a/target/microblaze/helper.c > +++ b/target/microblaze/helper.c > @@ -52,7 +52,7 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size, > { > MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); > CPUMBState *env = &cpu->env; > - struct microblaze_mmu_lookup lu; > + MicroBlazeMMULookup lu; > unsigned int hit; > int prot; > > @@ -235,7 +235,7 @@ hwaddr mb_cpu_get_phys_page_debug(CPUState *cs, vaddr > addr) > MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); > CPUMBState *env = &cpu->env; > target_ulong vaddr, paddr = 0; > - struct microblaze_mmu_lookup lu; > + MicroBlazeMMULookup lu; > int mmu_idx = cpu_mmu_index(env, false); > unsigned int hit; > > diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c > index 6e583d78d9..0546cfd0bc 100644 > --- a/target/microblaze/mmu.c > +++ b/target/microblaze/mmu.c > @@ -35,7 +35,7 @@ static unsigned int tlb_decode_size(unsigned int f) > static void mmu_flush_idx(CPUMBState *env, unsigned int idx) > { > CPUState *cs = env_cpu(env); > - struct microblaze_mmu *mmu = &env->mmu; > + MicroBlazeMMU *mmu = &env->mmu; > unsigned int tlb_size; > uint32_t tlb_tag, end, t; > > @@ -55,7 +55,7 @@ static void mmu_flush_idx(CPUMBState *env, unsigned int idx) > > static void mmu_change_pid(CPUMBState *env, unsigned int newpid) > { > - struct microblaze_mmu *mmu = &env->mmu; > + MicroBlazeMMU *mmu = &env->mmu; > unsigned int i; > uint32_t t; > > @@ -73,8 +73,7 @@ static void mmu_change_pid(CPUMBState *env, unsigned int > newpid) > } > > /* rw - 0 = read, 1 = write, 2 = fetch. */ > -unsigned int mmu_translate(struct microblaze_mmu *mmu, > - struct microblaze_mmu_lookup *lu, > +unsigned int mmu_translate(MicroBlazeMMU *mmu, MicroBlazeMMULookup *lu, > target_ulong vaddr, int rw, int mmu_idx) > { > unsigned int i, hit = 0; > @@ -290,7 +289,7 @@ void mmu_write(CPUMBState *env, bool ext, uint32_t rn, > uint32_t v) > break; > case MMU_R_TLBSX: > { > - struct microblaze_mmu_lookup lu; > + MicroBlazeMMULookup lu; > int hit; > > if (env->mmu.c_mmu_tlb_access <= 1) { > @@ -314,7 +313,7 @@ void mmu_write(CPUMBState *env, bool ext, uint32_t rn, > uint32_t v) > } > } > > -void mmu_init(struct microblaze_mmu *mmu) > +void mmu_init(MicroBlazeMMU *mmu) > { > int i; > for (i = 0; i < ARRAY_SIZE(mmu->regs); i++) { > -- > 2.25.1 >
