On 16/07/20 10:20, Xiaoyao Li wrote: > Per Intel SDM vol 1, 13.2, if CPUID.1:ECX.XSAVE[bit 26] is 0, the > processor provides no further enumeration through CPUID function 0DH. > > Signed-off-by: Xiaoyao Li <[email protected]> > --- > target/i386/cpu.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 1e5123251d74..f5f11603e805 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -6261,6 +6261,8 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu) > uint64_t mask; > > if (!(env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE)) { > + env->features[FEAT_XSAVE_COMP_LO] = 0; > + env->features[FEAT_XSAVE_COMP_HI] = 0; > return; > } > >
Queued this patch, noting in the commit message that it affects "-cpu host,-xsave". Paolo
