On 8/11/20 9:49 AM, Andrew Jones wrote:
> Yes, except you need to drop the ARM_FEATURE_SPE define and use the ID
> register bit instead like "sve_supported" does.
On a related note, I think we have a latent bug, or at least a mis-feature:
sve_supported = ioctl(fdarray[0], KVM_CHECK_EXTENSION, KVM_CAP_ARM_SVE) > 0;
...
/* Add feature bits that can't appear until after VCPU init. */
if (sve_supported) {
t = ahcf->isar.id_aa64pfr0;
t = FIELD_DP64(t, ID_AA64PFR0, SVE, 1);
ahcf->isar.id_aa64pfr0 = t;
}
Should it in fact be
if (!sve_supported) {
t = ahcf->isar.id_aa64pfr0;
t = FIELD_DP64(t, ID_AA64PFR0, SVE, 0);
ahcf->isar.id_aa64pfr0 = t;
}
?
Forcing the value to 1 here is going to be wrong the moment we have an SVE2
enabled cpu.
Similarly, SPE has more than one "enabled" value for PMSVer.
r~
