On Thu, 6 Aug 2020 at 13:21, Cédric Le Goater <[email protected]> wrote: > > As we don't model the RX or TX FIFO, raise the "Packet moved to RX > FIFO" interrupt status bit as soon as we are handling a RX packet. > > Cc: Frederic Konrad <[email protected]> > Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Joel Stanley <[email protected]> > --- > hw/net/ftgmac100.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c > index aa3c05ef9882..5c0fe2d8cb75 100644 > --- a/hw/net/ftgmac100.c > +++ b/hw/net/ftgmac100.c > @@ -950,6 +950,7 @@ static ssize_t ftgmac100_receive(NetClientState *nc, > const uint8_t *buf, > break; > } > > + s->isr |= FTGMAC100_INT_RPKT_FIFO; > addr = s->rx_descriptor; > while (size > 0) { > if (!ftgmac100_can_receive(nc)) { > @@ -1001,8 +1002,6 @@ static ssize_t ftgmac100_receive(NetClientState *nc, > const uint8_t *buf, > /* Last buffer in frame. */ > bd.des0 |= flags | FTGMAC100_RXDES0_LRS; > s->isr |= FTGMAC100_INT_RPKT_BUF; > - } else { > - s->isr |= FTGMAC100_INT_RPKT_FIFO; > } > ftgmac100_write_bd(&bd, addr); > if (bd.des0 & s->rxdes0_edorr) { > -- > 2.25.4 >
