On Tue, 28 Jul 2020 at 16:08, Eric Auger <[email protected]> wrote: > > SMMU3.2 brings the support of range-based TLB invalidation and > level hint. When this feature is supported, the SMMUv3 driver > is allowed to send TLB invalidations for a range of IOVAs instead > of using page based invalidation. > > Implementing this feature in the virtual SMMUv3 device is > mandated for DPDK on guest use case: DPDK uses hugepage > buffers and guest sends invalidations for blocks. Without > this feature, a guest invalidation of a block of 1GB for instance > translates into a storm of page invalidations. Each of them > is trapped by the VMM and cascaded downto the physical IOMMU. > This completely stalls the execution. This integration issue > was initially reported in [1]. > > Now SMMUv3.2 specifies additional parameters to NH_VA and NH_VAA > stage 1 invalidation commands so we can support those extensions. > > Supporting block mappings in the IOTLB look sensible in terms of > TLB entry consumption. However looking at virtio/vhost device usage, > without block mapping and without range invalidation (< 5.7 kernels > it may be less performant. However for recent guest kernels > supporting range invalidations [2], the performance should be similar.
I think this is all reviewed now; I've put it on my list of series to apply to target-arm.next in once 5.1 is out and we reopen the trunk for 5.2. thanks -- PMM
