** Changed in: qemu
       Status: Incomplete => Invalid

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https://bugs.launchpad.net/bugs/1863526

Title:
  NVIC CCR register not 8-bit accessible using Cortex-M4

Status in QEMU:
  Invalid

Bug description:
  Head at commit b29c3e23f64938.

  Running with '-d unimp,guest_errors -trace nvic\*' I get:

  [email protected]:nvic_sysreg_read NVIC sysreg read addr 0xd88 data 
0xf00000 size 4
  [email protected]:nvic_sysreg_write NVIC sysreg write addr 0xd88 data 
0xf00000 size 4
  [email protected]:nvic_sysreg_write NVIC sysreg write addr 0xd08 data 
0x4200 size 4
  [email protected]:nvic_sysreg_write NVIC sysreg write addr 0xd15 data 
0x0 size 1
  NVIC: Bad write of size 1 at offset 0xd15
  [email protected]:nvic_sysreg_write NVIC sysreg write addr 0xd16 data 
0x0 size 1
  NVIC: Bad write of size 1 at offset 0xd16
  [email protected]:nvic_sysreg_write NVIC sysreg write addr 0xd17 data 
0x0 size 1
  NVIC: Bad write of size 1 at offset 0xd17
  [email protected]:nvic_sysreg_write NVIC sysreg write addr 0xd18 data 
0x0 size 1
  [email protected]:nvic_set_prio NVIC set irq 4 secure-bank 0 priority 0
  [email protected]:nvic_recompute_state NVIC state recomputed: 
vectpending 0 vectpending_prio 256 exception_prio 256
  [email protected]:nvic_irq_update NVIC vectpending 0 pending prio 256 
exception_prio 256: setting irq line to 0
  [email protected]:nvic_sysreg_write NVIC sysreg write addr 0xd19 data 
0x0 size 1
  [email protected]:nvic_set_prio NVIC set irq 5 secure-bank 0 priority 0

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