On 7/7/20 12:00 AM, Philippe Mathieu-Daudé wrote:
> @@ -1385,7 +1385,7 @@ static bool trans_SBRC(DisasContext *ctx, arg_SBRC *a)
> {
> TCGv Rr = cpu_r[a->rr];
>
> - ctx->skip_cond = TCG_COND_EQ;
> + ctx->skip_cond = TCG_COND_NE;
> ctx->skip_var0 = tcg_temp_new();
> ctx->free_skip_var0 = true;
This is wrong. The next line is
> tcg_gen_andi_tl(ctx->skip_var0, Rr, 1 << a->bit);
So we compute "var = R & bit", which should be zero for "Skip if Bit in
Register Clear". Thus "var EQ 0" is the correct test.
> @@ -1401,7 +1401,7 @@ static bool trans_SBRS(DisasContext *ctx, arg_SBRS *a)
> {
> TCGv Rr = cpu_r[a->rr];
>
> - ctx->skip_cond = TCG_COND_NE;
> + ctx->skip_cond = TCG_COND_EQ;
> ctx->skip_var0 = tcg_temp_new();
> ctx->free_skip_var0 = true;
Similarly this is "var NE 0".
r~
