On Fri, 3 Jul 2020 at 15:15, 沈梦姣 <[email protected]> wrote:
>
> Because in translate stage when write cpu register by guest code, it operates
> totally on cpu_R of DisasContext, how to reflect it to register of
> CPUArchState?
You don't say which target you're looking at, but in general
these mappings are set up when the translator is initialized.
For instance for Arm, arm_translate_init() does this:
for (i = 0; i < 16; i++) {
cpu_R[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUARMState, regs[i]),
regnames[i]);
}
which creates the cpu_R[] TCGvs as TCG global variables which
live in the regs[] field of the CPUARMState structure. Whenever
TCG code is generated that accesses that global it will read
and write from the memory location corresponding to the
regs[] array entry in the CPU struct.
thanks
-- PMM