On 6/9/20 6:02 PM, Peter Maydell wrote: > This patchset converts the Neon insns in the "3 registers of different > lengths" group to decodetree. Patch 1 is a bugfix for an earlier > part of the conversion that's now in master. > > I'm definitely finding that the new decodetree version of Neon > is often easier to understand because we no longer try to > accommodate multiple different kinds of widening/narrowing/etc > insns in a single multi-pass loop: expanding out the loop and > specializing it to the particular insn type helps a lot.
I agree. The TCG ARM code is well documented, but the decodetree view makes it easier to review. Kinda obvious when you compare with the TCG code in older QEMU architectures. Personally I also find it easier to set breakpoints. > (Or maybe it's just that having to read the old code and write > the new version means I understand it better ;-)) > > Based-on: id:[email protected] > ("[PATCH v3 0/9] decodetree: Add non-overlapping groups") > because we use the new group syntax to set up the structure > for the "size==0b11" vs "size!=0b11" decode which we'll fill > in in subsequent patchsets. > > thanks > -- PMM > > Peter Maydell (7): > target/arm: Fix missing temp frees in do_vshll_2sh > target/arm: Convert Neon 3-reg-diff prewidening ops to decodetree > target/arm: Convert Neon 3-reg-diff narrowing ops to decodetree > target/arm: Convert Neon 3-reg-diff VABAL, VABDL to decodetree > target/arm: Convert Neon 3-reg-diff long multiplies > target/arm: Convert Neon 3-reg-diff saturating doubling multiplies > target/arm: Convert Neon 3-reg-diff polynomial VMULL > > target/arm/translate.h | 1 + > target/arm/neon-dp.decode | 72 +++++ > target/arm/translate-neon.inc.c | 521 ++++++++++++++++++++++++++++++++ > target/arm/translate.c | 222 +------------- > 4 files changed, 597 insertions(+), 219 deletions(-) >
