On Mon, Mar 23, 2020 at 09:05:06AM +0100, Paolo Bonzini wrote: > On 22/03/20 17:27, Philippe Mathieu-Daudé wrote: > >>> > >> That 'ugly' is typically used within QEMU to deal with such things > >> probably due to its low complexity. > > > > OK. Can you point me to the documentation for this feature? I can find > > reference of GPE in the ICH9, but I can't find where this IO address on > > the PIIX4 comes from: > > > > #define GPE_BASE 0xafe0 > > It's made up. The implementation is placed in PIIX4_PM because it is > referenced by the ACPI tables. Real hardware would probably place this > in the ACPI embedded controller or in the BMC. > > Paolo
Yes, there was nothing at 0xafe0 at the time ACPI support was written.
