Peter Maydell <[email protected]> writes: > On Mon, 11 Mar 2019 at 22:10, Markus Armbruster <[email protected]> wrote: >> >> Machine "ref405ep" maps its flash memory at address 2^32 - image size. >> Image size is rounded up to the next multiple of 64KiB. Useless, >> because pflash_cfi02_realize() fails with "failed to read the initial >> flash content" unless the rounding is a no-op. >> >> If the image size exceeds 0x80000 Bytes, we overlap first SRAM, then >> other stuff. No idea how that would play out, but useful outcomes >> seem unlikely. >> >> Map the flash memory at fixed address 0xFFF80000 with size 512KiB, >> regardless of image size, to match the physical hardware. >> >> Machine "taihu" maps its boot flash memory similarly. The code even >> has a comment /* XXX: should check that size is 2MB */, followed by >> disabled code to adjust the size to 2MiB regardless of image size. >> >> Its code to map its application flash memory looks the same, except >> there the XXX comment asks for 32MiB, and the code to adjust the size >> isn't disabled. Note that pflash_cfi02_realize() fails with "failed >> to read the initial flash content" for images smaller than 32MiB. >> >> Map the boot flash memory at fixed address 0xFFE00000 with size 2MiB, >> to match the physical hardware. Delete dead code from application >> flash mapping, and simplify some. >> >> Cc: David Gibson <[email protected]> >> Signed-off-by: Markus Armbruster <[email protected]> >> Acked-by: David Gibson <[email protected]> >> Reviewed-by: Alex Bennée <[email protected]> >> Message-Id: <[email protected]> >> --- >> hw/ppc/ppc405_boards.c | 36 ++++++++++++------------------------ >> 1 file changed, 12 insertions(+), 24 deletions(-) > > Hi; Coverity has just noticed a minor bug in this patch > (CID 1421917): [...] > Anybody feel like sending a patch? > > thanks > -- PMM
Philippe just posted the obvious fix. [...]
