The TGE bit routes all asynchronous exceptions to EL2.
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
---
target/arm/helper.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0e2278b5aa..c239711641 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8455,6 +8455,12 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t
excp_idx,
break;
};
+ /*
+ * For these purposes, TGE and AMO/IMO/FMO both force the
+ * interrupt to EL2. Fold TGE into the bit extracted above.
+ */
+ hcr |= (hcr_el2 & HCR_TGE) != 0;
+
/* Perform a table-lookup for the target EL given the current state */
target_el = target_el_table[is64][scr][rw][hcr][secure][cur_el];
--
2.20.1